JPS5798044A - Device for controlling instruction - Google Patents

Device for controlling instruction

Info

Publication number
JPS5798044A
JPS5798044A JP17543080A JP17543080A JPS5798044A JP S5798044 A JPS5798044 A JP S5798044A JP 17543080 A JP17543080 A JP 17543080A JP 17543080 A JP17543080 A JP 17543080A JP S5798044 A JPS5798044 A JP S5798044A
Authority
JP
Japan
Prior art keywords
registers
instruction
register
counter
data
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP17543080A
Other languages
Japanese (ja)
Other versions
JPS6128140B2 (en
Inventor
Kazushi Sakamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP17543080A priority Critical patent/JPS5798044A/en
Publication of JPS5798044A publication Critical patent/JPS5798044A/en
Publication of JPS6128140B2 publication Critical patent/JPS6128140B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3802—Instruction prefetching

Abstract

PURPOSE:To process data in a high speed by placing plural number of intermediate registers in the middle position between the first and the second instruction registers and holding different instructions in the plural number of intemediate registers at the same time to eliminate an idle time. CONSTITUTION:An instruction that controls read of data for processing is set to a read stage register 1, and No.1-No.3 start-up registers 3-5 that are to be the destination of transfer of the instruction that was set to this register are selected by No.1 counter 2. The configuration is so arranged that the instruction set to the register 1 can be held temporarily by these registers 3-5, and the instructions from these registers 3-5 are added to one side of AND circuits 7-9 respectively and the control signal from a counter 6 is added. And by the control signal of the counter 6, the output of the registers 3-5 is selected from the circuits 7-9, which is input to a write stage register 10 which controls writing. Thereby an idle time is eliminated and the data is processed in high speed.
JP17543080A 1980-12-12 1980-12-12 Device for controlling instruction Granted JPS5798044A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17543080A JPS5798044A (en) 1980-12-12 1980-12-12 Device for controlling instruction

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17543080A JPS5798044A (en) 1980-12-12 1980-12-12 Device for controlling instruction

Publications (2)

Publication Number Publication Date
JPS5798044A true JPS5798044A (en) 1982-06-18
JPS6128140B2 JPS6128140B2 (en) 1986-06-28

Family

ID=15995960

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17543080A Granted JPS5798044A (en) 1980-12-12 1980-12-12 Device for controlling instruction

Country Status (1)

Country Link
JP (1) JPS5798044A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0548284Y2 (en) * 1985-08-21 1993-12-22

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5367328A (en) * 1976-11-29 1978-06-15 Nec Corp Order process system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5367328A (en) * 1976-11-29 1978-06-15 Nec Corp Order process system

Also Published As

Publication number Publication date
JPS6128140B2 (en) 1986-06-28

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