JPS5794999A - Protection system for microinstruction control memory - Google Patents

Protection system for microinstruction control memory

Info

Publication number
JPS5794999A
JPS5794999A JP17159780A JP17159780A JPS5794999A JP S5794999 A JPS5794999 A JP S5794999A JP 17159780 A JP17159780 A JP 17159780A JP 17159780 A JP17159780 A JP 17159780A JP S5794999 A JPS5794999 A JP S5794999A
Authority
JP
Japan
Prior art keywords
address
boundary
microinstruction
register
access
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP17159780A
Other languages
Japanese (ja)
Inventor
Shoichi Ibori
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP17159780A priority Critical patent/JPS5794999A/en
Publication of JPS5794999A publication Critical patent/JPS5794999A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G06F9/26—Address formation of the next micro-instruction ; Microprogram storage or retrieval arrangements
    • G06F9/262—Arrangements for next microinstruction selection
    • G06F9/268—Microinstruction selection not based on processing results, e.g. interrupt, patch, first cycle store, diagnostic programs

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Storage Device Security (AREA)

Abstract

PURPOSE:To decrease the number of steps of microinstructions in a processor, by providing a boundary register at the side of a read/write memory instead of providing it in the inside of the processor. CONSTITUTION:Prior to the execution of a microinstruction for memory access, a boundary address is supplied as an intermediate-order address 10 among transfer addresses through an interface line 17 by one of processors 20-22 with a microinstruction to be set in a boundary register 7 by a strobe signal 16. An arithmetic unit 6 adds the intermediate-order address 10 and high-order address 11 to the said boundary address by an addition indication signal, and the result- ing address 15 is set in an address register 4 to attain access by using an access address consisting of the said address and a set low-order address 9.
JP17159780A 1980-12-05 1980-12-05 Protection system for microinstruction control memory Pending JPS5794999A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP17159780A JPS5794999A (en) 1980-12-05 1980-12-05 Protection system for microinstruction control memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP17159780A JPS5794999A (en) 1980-12-05 1980-12-05 Protection system for microinstruction control memory

Publications (1)

Publication Number Publication Date
JPS5794999A true JPS5794999A (en) 1982-06-12

Family

ID=15926109

Family Applications (1)

Application Number Title Priority Date Filing Date
JP17159780A Pending JPS5794999A (en) 1980-12-05 1980-12-05 Protection system for microinstruction control memory

Country Status (1)

Country Link
JP (1) JPS5794999A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59186022A (en) * 1983-04-07 1984-10-22 Nec Corp Interface controlling device
JPS59189434A (en) * 1983-04-13 1984-10-27 Nec Corp Interface control device
JPH023164A (en) * 1988-06-16 1990-01-08 Sharp Corp Dual port memory
JPH0547504U (en) * 1991-11-28 1993-06-25 エスエムシー株式会社 Drive device for fluid pressure actuator

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59186022A (en) * 1983-04-07 1984-10-22 Nec Corp Interface controlling device
JPS59189434A (en) * 1983-04-13 1984-10-27 Nec Corp Interface control device
JPH023164A (en) * 1988-06-16 1990-01-08 Sharp Corp Dual port memory
JPH0547504U (en) * 1991-11-28 1993-06-25 エスエムシー株式会社 Drive device for fluid pressure actuator

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