JPS5794990A - Data rom - Google Patents
Data romInfo
- Publication number
- JPS5794990A JPS5794990A JP17053480A JP17053480A JPS5794990A JP S5794990 A JPS5794990 A JP S5794990A JP 17053480 A JP17053480 A JP 17053480A JP 17053480 A JP17053480 A JP 17053480A JP S5794990 A JPS5794990 A JP S5794990A
- Authority
- JP
- Japan
- Prior art keywords
- output
- input
- lines
- line
- voltage level
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5692—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency read-only digital stores using storage elements with more than two stable states
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
Abstract
PURPOSE:To increase storage capacity by a limited number of storage elements outputting data, which has >=3 states, to output lines by varying the voltage levels of input lines. CONSTITUTION:Address-coded input lines 1, output lines 2, and a latch clock input line 3 constitute a data ROM wherein the relative relation between input and output signals is fixed. When a prescribed voltage level is inputted to an input line 1, a transistor TR4 turns on and a TR5 turns off because they have different threshold levels, thereby outputting a level Vss to an output line (c). In addition, when another voltage level is inputted to the input line 1 to turn on the TRs 4 and 5, the level Vss is outputted to output lines (b) and (c). Then, when a voltage VDD is supplied as the voltage level, it is outputted to an out- put line (a) to generate an output which has at least three states, increasing storage capacity.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17053480A JPS5794990A (en) | 1980-12-03 | 1980-12-03 | Data rom |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17053480A JPS5794990A (en) | 1980-12-03 | 1980-12-03 | Data rom |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5794990A true JPS5794990A (en) | 1982-06-12 |
Family
ID=15906694
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17053480A Pending JPS5794990A (en) | 1980-12-03 | 1980-12-03 | Data rom |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5794990A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0634750A2 (en) * | 1993-07-12 | 1995-01-18 | Kabushiki Kaisha Toshiba | Apparatus and method for reading multi-level data stored in a semiconductor memory |
WO1995031814A1 (en) * | 1994-05-13 | 1995-11-23 | Aplus Integrated Circuits, Inc. | Multistate rom memory cell array |
-
1980
- 1980-12-03 JP JP17053480A patent/JPS5794990A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0634750A2 (en) * | 1993-07-12 | 1995-01-18 | Kabushiki Kaisha Toshiba | Apparatus and method for reading multi-level data stored in a semiconductor memory |
US5852575A (en) * | 1993-07-12 | 1998-12-22 | Kabushiki Kaisha Toshiba | Apparatus and method for reading multi-level data stored in a semiconductor memory |
WO1995031814A1 (en) * | 1994-05-13 | 1995-11-23 | Aplus Integrated Circuits, Inc. | Multistate rom memory cell array |
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