JPS5792496A - Diagnostic system for memory - Google Patents

Diagnostic system for memory

Info

Publication number
JPS5792496A
JPS5792496A JP55166158A JP16615880A JPS5792496A JP S5792496 A JPS5792496 A JP S5792496A JP 55166158 A JP55166158 A JP 55166158A JP 16615880 A JP16615880 A JP 16615880A JP S5792496 A JPS5792496 A JP S5792496A
Authority
JP
Japan
Prior art keywords
data
memory
noncompression
compressor
res
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55166158A
Other languages
Japanese (ja)
Inventor
Yasunori Maezawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55166158A priority Critical patent/JPS5792496A/en
Publication of JPS5792496A publication Critical patent/JPS5792496A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To diagnose a buffer memory easily by comparing pattern data, read out of the memory to be diagnosed, with reference pattern data. CONSTITUTION:According to a program in a main storage device MM, a CPU inputs an address, data length and a write command regarding the device MM to a compressor COM and a restoration device RES via a bus B. The devices COM and RES read checkered pattern data out of the memory MM. The checkered pattern has the information transferring picture elements for white and black vertically and horizontally, and the result of compression shows a greater value than the amount of input data. Therefore, the compressor with a noncompression function outputs the input data together with an additional flag which shows noncompression. The CPU checks by comparison wherher the output data is coincident with data in figure (a) and, when not, consideres a memory element corresponding a different part to be faulty. Data in figure (b) is also used to perform the same processing, thereby detecting the fault of even one bit.
JP55166158A 1980-11-26 1980-11-26 Diagnostic system for memory Pending JPS5792496A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55166158A JPS5792496A (en) 1980-11-26 1980-11-26 Diagnostic system for memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55166158A JPS5792496A (en) 1980-11-26 1980-11-26 Diagnostic system for memory

Publications (1)

Publication Number Publication Date
JPS5792496A true JPS5792496A (en) 1982-06-09

Family

ID=15826135

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55166158A Pending JPS5792496A (en) 1980-11-26 1980-11-26 Diagnostic system for memory

Country Status (1)

Country Link
JP (1) JPS5792496A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04349299A (en) * 1991-05-27 1992-12-03 Nec Ic Microcomput Syst Ltd Ram testing circuit incorporating lsi

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04349299A (en) * 1991-05-27 1992-12-03 Nec Ic Microcomput Syst Ltd Ram testing circuit incorporating lsi

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