JPS5787254A - Data repeating installation - Google Patents

Data repeating installation

Info

Publication number
JPS5787254A
JPS5787254A JP55161994A JP16199480A JPS5787254A JP S5787254 A JPS5787254 A JP S5787254A JP 55161994 A JP55161994 A JP 55161994A JP 16199480 A JP16199480 A JP 16199480A JP S5787254 A JPS5787254 A JP S5787254A
Authority
JP
Japan
Prior art keywords
data
synchronizing signal
bit buffer
sequence
modem
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55161994A
Other languages
Japanese (ja)
Other versions
JPS6355264B2 (en
Inventor
Shigeo Kobayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP55161994A priority Critical patent/JPS5787254A/en
Publication of JPS5787254A publication Critical patent/JPS5787254A/en
Publication of JPS6355264B2 publication Critical patent/JPS6355264B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L1/00—Arrangements for detecting or preventing errors in the information received
    • H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
    • H04L1/0083—Formatting with frames or packets; Protocol or part of protocol for error control

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Time-Division Multiplex Systems (AREA)
  • Small-Scale Networks (AREA)
  • Communication Control (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

PURPOSE:To reduce the repeating delay and reduce the cost, by inhibiting the input by an abort sequence and by inputting a pseudo flag sequence by a flag sequence, in the data repeater which repeats a bit synchronizing signal. CONSTITUTION:A data repeating installation 4' takes receiving data into a bit buffer 48 as serial data still synchronously with the synchronizing signal extracted from data received from a terminal equipment 3 and outputs data in the bit buffer 48 in serial synchronously with the synchronizing signal of an MODEM. If the frequency of the synchronizing signal extracted from receiving data is higher than that of the synchronizing signal of the MODEM, the input of the bit buffer 48 is inhibited temporarily when an abort sequence is issued from the terminal equipment 3. When the number of bits of data stored in the bit buffer 48 is decreased to a prescribed number, the data input is restarted. If the frequency of the synchronizing signal extracted from receiving data is lower than that of the synchronizing signal of the MODEM, a pseudo flag sequence is inputted to the bit buffer 48 just after a flat sequence is transmitted from the terminal equipment 3, thus absorbing the frequency shift.
JP55161994A 1980-11-19 1980-11-19 Data repeating installation Granted JPS5787254A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55161994A JPS5787254A (en) 1980-11-19 1980-11-19 Data repeating installation

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55161994A JPS5787254A (en) 1980-11-19 1980-11-19 Data repeating installation

Publications (2)

Publication Number Publication Date
JPS5787254A true JPS5787254A (en) 1982-05-31
JPS6355264B2 JPS6355264B2 (en) 1988-11-01

Family

ID=15746008

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55161994A Granted JPS5787254A (en) 1980-11-19 1980-11-19 Data repeating installation

Country Status (1)

Country Link
JP (1) JPS5787254A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59104845A (en) * 1982-12-08 1984-06-16 Sumitomo Electric Ind Ltd Data transmitter
JPS62234437A (en) * 1986-04-04 1987-10-14 Nec Corp Data communication synchronizing device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59104845A (en) * 1982-12-08 1984-06-16 Sumitomo Electric Ind Ltd Data transmitter
JPH0410775B2 (en) * 1982-12-08 1992-02-26
JPS62234437A (en) * 1986-04-04 1987-10-14 Nec Corp Data communication synchronizing device

Also Published As

Publication number Publication date
JPS6355264B2 (en) 1988-11-01

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