JPS5758484A - Digital transmission system - Google Patents
Digital transmission systemInfo
- Publication number
- JPS5758484A JPS5758484A JP55133214A JP13321480A JPS5758484A JP S5758484 A JPS5758484 A JP S5758484A JP 55133214 A JP55133214 A JP 55133214A JP 13321480 A JP13321480 A JP 13321480A JP S5758484 A JPS5758484 A JP S5758484A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- flc
- distortion
- code
- minimized
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N7/00—Television systems
- H04N7/025—Systems for the transmission of digital non-picture data, e.g. of text during the active part of a television frame
- H04N7/035—Circuits for the digital non-picture data signal, e.g. for slicing of the data signal, for regeneration of the data-clock signal, for error detection or correction of the data signal
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Television Systems (AREA)
- Time-Division Multiplex Systems (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
PURPOSE:To compensate the lowering in eye height ratio, by selecting the code constitution of a framing code signal which makes possibly small the linear distortion and phase distortion received with group delay characteristics of a transmission line before the data sampling point in a receiver from a transmitter. CONSTITUTION:Framing code is selected so that a framing code FLC signal has comparatively higher frequency component, thus so that consecutive number of bits of ''1'' or ''0'' can be minimized. For example, the signal that ''1'' or ''2'' is not consecutive in >=2 bits is formed at a timing pulse forming circuit 5 from the FLC in 8- bit having the error protection function of 1-bit and for example, 00101101 is adopted, then the waveform distortion and phase distortion can possibly be minimized. Thus, the decrease in the eye height of the FLC signal can be compensated.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55133214A JPS5758484A (en) | 1980-09-24 | 1980-09-24 | Digital transmission system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55133214A JPS5758484A (en) | 1980-09-24 | 1980-09-24 | Digital transmission system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5758484A true JPS5758484A (en) | 1982-04-08 |
Family
ID=15099388
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55133214A Pending JPS5758484A (en) | 1980-09-24 | 1980-09-24 | Digital transmission system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5758484A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0663610U (en) * | 1993-02-23 | 1994-09-09 | 株式会社ダイトー | Abandoned formwork |
-
1980
- 1980-09-24 JP JP55133214A patent/JPS5758484A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0663610U (en) * | 1993-02-23 | 1994-09-09 | 株式会社ダイトー | Abandoned formwork |
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