JPS57109444A - Telemeter device for pcm communication system - Google Patents
Telemeter device for pcm communication systemInfo
- Publication number
- JPS57109444A JPS57109444A JP55185831A JP18583180A JPS57109444A JP S57109444 A JPS57109444 A JP S57109444A JP 55185831 A JP55185831 A JP 55185831A JP 18583180 A JP18583180 A JP 18583180A JP S57109444 A JPS57109444 A JP S57109444A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- waveform
- clock signal
- phase
- clock
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L7/00—Arrangements for synchronising receiver with transmitter
- H04L7/0079—Receiver details
- H04L7/0083—Receiver details taking measures against momentary loss of synchronisation, e.g. inhibiting the synchronisation, using idle words or using redundant clocks
Landscapes
- Engineering & Computer Science (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Transmission Systems Not Characterized By The Medium Used For Transmission (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
PURPOSE:To eliminate the influence of mixture of a PCM transmission signal into a clock signal near a threshold level, by delaying the phase of the clock signal from a receiving part at a transmitting part. CONSTITUTION:When a clock signal (a) is transmitted from a receiving part 1, this signal is received as a waveform (b) by a transmitting part 2, and the waveform (b) is shaped to a waveform (c). The phse of the waveform (c) is delayed in a phase delay circuit 24 into a waveform (d). A synchronizing signal is generated by this phase delayed clock signal, and PCM data is added to the synchronizing signal, and they are transmitted as a signal (e) from a transmitting circuit 23. By delaying the phase of the clock signal in this manner, the influence of crosstalk is reduced considerably in comparison with the conventional device because a noise N is generated at the inversion point of the clock receiving signal as shown in figure (f).
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55185831A JPS57109444A (en) | 1980-12-26 | 1980-12-26 | Telemeter device for pcm communication system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55185831A JPS57109444A (en) | 1980-12-26 | 1980-12-26 | Telemeter device for pcm communication system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57109444A true JPS57109444A (en) | 1982-07-07 |
Family
ID=16177634
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55185831A Pending JPS57109444A (en) | 1980-12-26 | 1980-12-26 | Telemeter device for pcm communication system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57109444A (en) |
-
1980
- 1980-12-26 JP JP55185831A patent/JPS57109444A/en active Pending
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