JPS5779625A - Gettering of silicon wafer - Google Patents

Gettering of silicon wafer

Info

Publication number
JPS5779625A
JPS5779625A JP15629180A JP15629180A JPS5779625A JP S5779625 A JPS5779625 A JP S5779625A JP 15629180 A JP15629180 A JP 15629180A JP 15629180 A JP15629180 A JP 15629180A JP S5779625 A JPS5779625 A JP S5779625A
Authority
JP
Japan
Prior art keywords
silicon wafer
plasma
stacking faults
treatment
etching
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15629180A
Other languages
Japanese (ja)
Inventor
Shinichi Konishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP15629180A priority Critical patent/JPS5779625A/en
Publication of JPS5779625A publication Critical patent/JPS5779625A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Drying Of Semiconductors (AREA)

Abstract

PURPOSE:To collect stacking faults into etching damage and to reduce stacking faults of a silicon wafer by a method wherein plasma etching with CF4 is performed to the back of the silicon wafer. CONSTITUTION:Plasma etching with Freon gas is performed to the back of the silicon wafer to form etching damage within thickness of several hundred Angstrom , the factors of stacking faults are collected in the etching damage, and then the plasma cleaning treatment with oxygen gas for removal of contamination generated during the plasma treatment is performed. Accordingly the stacking faults in an oxide film generated by thermal oxidation are removed, characteristic of the wafer element is stabilized, and the treatment of the back of wafer with the plasma treatment is simplified.
JP15629180A 1980-11-05 1980-11-05 Gettering of silicon wafer Pending JPS5779625A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15629180A JPS5779625A (en) 1980-11-05 1980-11-05 Gettering of silicon wafer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15629180A JPS5779625A (en) 1980-11-05 1980-11-05 Gettering of silicon wafer

Publications (1)

Publication Number Publication Date
JPS5779625A true JPS5779625A (en) 1982-05-18

Family

ID=15624593

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15629180A Pending JPS5779625A (en) 1980-11-05 1980-11-05 Gettering of silicon wafer

Country Status (1)

Country Link
JP (1) JPS5779625A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59103348A (en) * 1982-12-06 1984-06-14 Toyota Central Res & Dev Lab Inc Manufacture of semiconductor device
JPS6047426A (en) * 1983-08-26 1985-03-14 Komatsu Denshi Kinzoku Kk Bsd-imparted semiconductor substrate
KR100405015B1 (en) * 1999-09-10 2003-11-07 가부시끼가이샤 도시바 A method of manufacturing semiconductor device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5051665A (en) * 1973-09-07 1975-05-08
JPS5362474A (en) * 1976-11-17 1978-06-03 Hitachi Ltd Cleaning method of metal photo mask

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5051665A (en) * 1973-09-07 1975-05-08
JPS5362474A (en) * 1976-11-17 1978-06-03 Hitachi Ltd Cleaning method of metal photo mask

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59103348A (en) * 1982-12-06 1984-06-14 Toyota Central Res & Dev Lab Inc Manufacture of semiconductor device
JPS6047426A (en) * 1983-08-26 1985-03-14 Komatsu Denshi Kinzoku Kk Bsd-imparted semiconductor substrate
JPS6355212B2 (en) * 1983-08-26 1988-11-01 Komatsu Denshi Kinzoku Kk
KR100405015B1 (en) * 1999-09-10 2003-11-07 가부시끼가이샤 도시바 A method of manufacturing semiconductor device

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