JPS5774883A - Semiconductor storage device - Google Patents
Semiconductor storage deviceInfo
- Publication number
- JPS5774883A JPS5774883A JP55148998A JP14899880A JPS5774883A JP S5774883 A JPS5774883 A JP S5774883A JP 55148998 A JP55148998 A JP 55148998A JP 14899880 A JP14899880 A JP 14899880A JP S5774883 A JPS5774883 A JP S5774883A
- Authority
- JP
- Japan
- Prior art keywords
- read
- level
- resistances
- storage device
- trt11
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
- G11C11/414—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction for memory cells of the bipolar type
- G11C11/416—Read-write [R-W] circuits
Abstract
PURPOSE:To realize high speed read-out of a static semiconductor storage device, and also to prevent breakdown of the storage contents, by lowering a level only in an instant of read-out, and keeping it high in other time. CONSTITUTION:A read-out level is made variable by providing a read-out level controlling circuit RLC. That is to say, when a memory cell M11 is selected, a transistor TRT12 is turned on, and a transistor TRT11 is turned off, a bit line current i12 flows into resistances R3, R4, so the voltage drops. Therefore, a read level Va fetched from the connecting point of the resistances R3,R4 goes down, and on the other hand, since the TRT11 is off and a bit line current i11 does not flow into resistances R1, R2, so a read level Vb fetched from the connecting point of the resistances R1, R2 becomes an H level. When a lead-out level is lowered only in an instant of read-out and it is kept in other time, by use of such a controlling circuit RLC, not only high speed read-out but also prevention of breakdown of the storage contents are realized.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55148998A JPS5774883A (en) | 1980-10-24 | 1980-10-24 | Semiconductor storage device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55148998A JPS5774883A (en) | 1980-10-24 | 1980-10-24 | Semiconductor storage device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5774883A true JPS5774883A (en) | 1982-05-11 |
Family
ID=15465412
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55148998A Pending JPS5774883A (en) | 1980-10-24 | 1980-10-24 | Semiconductor storage device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5774883A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0100851A2 (en) * | 1982-07-20 | 1984-02-22 | Siemens Aktiengesellschaft | Circuit arrangement for reading bipolar memory cells |
-
1980
- 1980-10-24 JP JP55148998A patent/JPS5774883A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0100851A2 (en) * | 1982-07-20 | 1984-02-22 | Siemens Aktiengesellschaft | Circuit arrangement for reading bipolar memory cells |
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