JPS5769746A - Flattening method for wafer for semiconductor device - Google Patents

Flattening method for wafer for semiconductor device

Info

Publication number
JPS5769746A
JPS5769746A JP14546580A JP14546580A JPS5769746A JP S5769746 A JPS5769746 A JP S5769746A JP 14546580 A JP14546580 A JP 14546580A JP 14546580 A JP14546580 A JP 14546580A JP S5769746 A JPS5769746 A JP S5769746A
Authority
JP
Japan
Prior art keywords
wafer
semiconductor device
reliability
projection
reducing agent
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP14546580A
Other languages
Japanese (ja)
Other versions
JPH02851B2 (en
Inventor
Kazumasa Shigematsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP14546580A priority Critical patent/JPS5769746A/en
Publication of JPS5769746A publication Critical patent/JPS5769746A/en
Publication of JPH02851B2 publication Critical patent/JPH02851B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)

Abstract

PURPOSE:To flatten the surface of a wafer and to improve the reliability of the wafer by forming completely a vapor phase grown film, then forming a viscous wear reducing agent thin film on the surface, pressing a flat plate in high hardness to break physically the projection or the like to pulverized particles, cleaning and drying them. CONSTITUTION:A vapor phase grown film 2 is provided on a substrate 1. A wear reducing agent 3 made of chemically stable liquid with high vescosity of polyvinyl alcohol is coated thinly on the surface. A flat plate 4 having hardness is pressed on the substrate 1 to break a projection 20 into finely pulverized particles. The particles are then cleaned and dried. In this manner, the surface of the wafer is flattened to enhance the reliability of the semiconductor device.
JP14546580A 1980-10-17 1980-10-17 Flattening method for wafer for semiconductor device Granted JPS5769746A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14546580A JPS5769746A (en) 1980-10-17 1980-10-17 Flattening method for wafer for semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14546580A JPS5769746A (en) 1980-10-17 1980-10-17 Flattening method for wafer for semiconductor device

Publications (2)

Publication Number Publication Date
JPS5769746A true JPS5769746A (en) 1982-04-28
JPH02851B2 JPH02851B2 (en) 1990-01-09

Family

ID=15385861

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14546580A Granted JPS5769746A (en) 1980-10-17 1980-10-17 Flattening method for wafer for semiconductor device

Country Status (1)

Country Link
JP (1) JPS5769746A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62128516A (en) * 1985-11-29 1987-06-10 Shin Etsu Handotai Co Ltd Removing method for projection of semiconductor wafer

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62128516A (en) * 1985-11-29 1987-06-10 Shin Etsu Handotai Co Ltd Removing method for projection of semiconductor wafer

Also Published As

Publication number Publication date
JPH02851B2 (en) 1990-01-09

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