JPS5755593A - Tristate associative storage circuit - Google Patents
Tristate associative storage circuitInfo
- Publication number
- JPS5755593A JPS5755593A JP13050380A JP13050380A JPS5755593A JP S5755593 A JPS5755593 A JP S5755593A JP 13050380 A JP13050380 A JP 13050380A JP 13050380 A JP13050380 A JP 13050380A JP S5755593 A JPS5755593 A JP S5755593A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- storage
- feedback loop
- tristate
- state
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C15/00—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores
- G11C15/04—Digital stores in which information comprising one or more characteristic parts is written into the store and in which information is read-out by searching for one or more of these characteristic parts, i.e. associative or content-addressed stores using semiconductor elements
Landscapes
- Logic Circuits (AREA)
Abstract
PURPOSE:To obtain a tristate associative storage circuit suited to a storage cell of programmable logic array, by storing the ternary signal with high efficiency and then reading the ternary signal associatively with the binary signal for an associative circuit. CONSTITUTION:NAND gates 23, 24 and 25 form a feedback loop with other output signals used as an input respectively; and the storage state of this feedback loop made to correspond to the ternary signal. A binary logic input signal X1 plus its NOT signal bar X1 are supplied to a reading means 30 comprising NAND gates 31, 32 and 33. Thus the state of the feedback loop is associatively read. The state storage of the feedback loops 23, 24 and 25 is set by writing the 1st and 2nd write input signals A1 and A2 under the control of a write control signal W1 passed through an inverter 12 as well as a wirte control signal W2 passed through a delaying circuit 11.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13050380A JPS5755593A (en) | 1980-09-19 | 1980-09-19 | Tristate associative storage circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13050380A JPS5755593A (en) | 1980-09-19 | 1980-09-19 | Tristate associative storage circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5755593A true JPS5755593A (en) | 1982-04-02 |
JPS6321996B2 JPS6321996B2 (en) | 1988-05-10 |
Family
ID=15035825
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13050380A Granted JPS5755593A (en) | 1980-09-19 | 1980-09-19 | Tristate associative storage circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5755593A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5914933A (en) * | 1982-07-15 | 1984-01-25 | Mitsubishi Heavy Ind Ltd | Unloader of tire vulcanizer |
-
1980
- 1980-09-19 JP JP13050380A patent/JPS5755593A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5914933A (en) * | 1982-07-15 | 1984-01-25 | Mitsubishi Heavy Ind Ltd | Unloader of tire vulcanizer |
JPH0367006B2 (en) * | 1982-07-15 | 1991-10-21 | Mitsubishi Heavy Ind Ltd |
Also Published As
Publication number | Publication date |
---|---|
JPS6321996B2 (en) | 1988-05-10 |
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