JPS5764855A - Storage device - Google Patents
Storage deviceInfo
- Publication number
- JPS5764855A JPS5764855A JP13946980A JP13946980A JPS5764855A JP S5764855 A JPS5764855 A JP S5764855A JP 13946980 A JP13946980 A JP 13946980A JP 13946980 A JP13946980 A JP 13946980A JP S5764855 A JPS5764855 A JP S5764855A
- Authority
- JP
- Japan
- Prior art keywords
- memories
- flag
- selectors
- terminal
- access
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/14—Handling requests for interconnection or transfer
- G06F13/16—Handling requests for interconnection or transfer for access to memory bus
Abstract
PURPOSE:To ensure the high-speed reading/writing even to the data which are in the relation of multiple bit number to each other, by indicating an access to both or either one of two memories and then switching these memories. CONSTITUTION:The 1st memory 21 and the 2ns memory 22 receive an access through an even and odd address respectively. Either one of these memories 21 and 22 is selected by reading selectors 25 and 26 plus writing selectors 27 and 28. An instruction showing both or either one of the memories 21 and 22 is given to a flag 43. Then a control circuit 45 makes both memories active or makes one of them active with the other made inactive respectively. In addition, a selection signal generating circuit 46 is provided to control selectors 25-28 by the flag 43 and the lowest bit of an address given from a terminal 44. Then an exclusive OR is secured between the output of the flag 43 and the lowest bit of the terminal 44. Thus the data of a terminal (a) or (b) can be selected.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13946980A JPS6012657B2 (en) | 1980-10-06 | 1980-10-06 | Storage device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP13946980A JPS6012657B2 (en) | 1980-10-06 | 1980-10-06 | Storage device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5764855A true JPS5764855A (en) | 1982-04-20 |
JPS6012657B2 JPS6012657B2 (en) | 1985-04-02 |
Family
ID=15245956
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP13946980A Expired JPS6012657B2 (en) | 1980-10-06 | 1980-10-06 | Storage device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS6012657B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61285542A (en) * | 1985-06-12 | 1986-12-16 | Mitsubishi Electric Corp | Instruction prefetching method |
-
1980
- 1980-10-06 JP JP13946980A patent/JPS6012657B2/en not_active Expired
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61285542A (en) * | 1985-06-12 | 1986-12-16 | Mitsubishi Electric Corp | Instruction prefetching method |
Also Published As
Publication number | Publication date |
---|---|
JPS6012657B2 (en) | 1985-04-02 |
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