JPS5753968A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS5753968A JPS5753968A JP55129541A JP12954180A JPS5753968A JP S5753968 A JPS5753968 A JP S5753968A JP 55129541 A JP55129541 A JP 55129541A JP 12954180 A JP12954180 A JP 12954180A JP S5753968 A JPS5753968 A JP S5753968A
- Authority
- JP
- Japan
- Prior art keywords
- sealing resin
- electrostatic charge
- organic compound
- semiconductive organic
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/60—Protection against electrostatic charges or discharges, e.g. Faraday shields
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12044—OLED
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
Abstract
PURPOSE:To prevent electrostatic charge caused destruction of a semiconductor by a method wherein the outer surface of sealing resin is covered with a semiconductive organic compound. CONSTITUTION:A film of a semiconductive organic compound that is a mixture of a chlorobenzene solution of polyvinylcarbazole and a chloroform solution of electron attracting SbCl3 is applied to the outer surface of sealing resin and is let to dry, the resultant coat lowering the outer surface volume resistance down to approximately 10<7>-10<12>OMEGA/cm (at room temperature) and preventing electrostatic charge. The mechanism of conductivity of such a semiconductive organic compound being that of electron conduction and therefore not requiring moisture to maintain itself, electrostatic charge can be fully prevented even in places where humidity is extremely low. In addition, the compound being free of ionization, the semiconductor device is not hurt as regards the reliability it enjoys. The whole sealing resin other than its outer surface remaining unchanged, there is no increase in leak between elements and leads.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55129541A JPS5753968A (en) | 1980-09-17 | 1980-09-17 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55129541A JPS5753968A (en) | 1980-09-17 | 1980-09-17 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5753968A true JPS5753968A (en) | 1982-03-31 |
Family
ID=15012067
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55129541A Pending JPS5753968A (en) | 1980-09-17 | 1980-09-17 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5753968A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4796080A (en) * | 1987-07-23 | 1989-01-03 | Fairchild Camera And Instrument Corporation | Semiconductor chip package configuration and method for facilitating its testing and mounting on a substrate |
JPH0252348U (en) * | 1988-10-03 | 1990-04-16 | ||
JPH02106940A (en) * | 1988-10-17 | 1990-04-19 | Semiconductor Energy Lab Co Ltd | Manufacture of electronic device |
US6756670B1 (en) | 1988-08-26 | 2004-06-29 | Semiconductor Energy Laboratory Co., Ltd. | Electronic device and its manufacturing method |
-
1980
- 1980-09-17 JP JP55129541A patent/JPS5753968A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4796080A (en) * | 1987-07-23 | 1989-01-03 | Fairchild Camera And Instrument Corporation | Semiconductor chip package configuration and method for facilitating its testing and mounting on a substrate |
US6756670B1 (en) | 1988-08-26 | 2004-06-29 | Semiconductor Energy Laboratory Co., Ltd. | Electronic device and its manufacturing method |
JPH0252348U (en) * | 1988-10-03 | 1990-04-16 | ||
JPH02106940A (en) * | 1988-10-17 | 1990-04-19 | Semiconductor Energy Lab Co Ltd | Manufacture of electronic device |
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