JPS5750158A - Carrier reproducing circuit - Google Patents

Carrier reproducing circuit

Info

Publication number
JPS5750158A
JPS5750158A JP55124677A JP12467780A JPS5750158A JP S5750158 A JPS5750158 A JP S5750158A JP 55124677 A JP55124677 A JP 55124677A JP 12467780 A JP12467780 A JP 12467780A JP S5750158 A JPS5750158 A JP S5750158A
Authority
JP
Japan
Prior art keywords
frequency
circuit
carrier
pll
vco5
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55124677A
Other languages
Japanese (ja)
Inventor
Masanori Honda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55124677A priority Critical patent/JPS5750158A/en
Publication of JPS5750158A publication Critical patent/JPS5750158A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H04L27/227—Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2271—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
    • H04L27/2272—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals using phase locked loops

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To make unnecessary a virtual drawing prevention circuit, sweep circuit and temperature compensating circuit, by providing a frequency discriminator in which the carrier frequency is set in advance. CONSTITUTION:A frequency discriminating circuit 21 discriminates the frequency of carrier of an input signal S, that is, signals of frequencies other than this frequency only are passed through. Thus, when a phase locked loop circuit (PLL) is drawn in an artificial drawing frequency, the output signal of a voltage controlled oscillator (VCO)5 passes through the frequency discriminating circuit 21, resulting that the output voltage of a low pass filter 23 is increased. AFC is given to the VCO5 with this output voltage and the PLL circuit is outside the artificial drawing frequency. When the PLL circuit is drawn in the carrier drawing frequency, the potential of the output signal of the frequency discriminating circuit 21 is zero, thus the potential of the low pass filter 23 is also zero and no AFC is given to the VCO5. Thus, when drawing is made once to the carrier drawing frequency, the frequency is kept to this drawing frequency.
JP55124677A 1980-09-10 1980-09-10 Carrier reproducing circuit Pending JPS5750158A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55124677A JPS5750158A (en) 1980-09-10 1980-09-10 Carrier reproducing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55124677A JPS5750158A (en) 1980-09-10 1980-09-10 Carrier reproducing circuit

Publications (1)

Publication Number Publication Date
JPS5750158A true JPS5750158A (en) 1982-03-24

Family

ID=14891328

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55124677A Pending JPS5750158A (en) 1980-09-10 1980-09-10 Carrier reproducing circuit

Country Status (1)

Country Link
JP (1) JPS5750158A (en)

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