JPS55105441A - Signal detection circuit - Google Patents
Signal detection circuitInfo
- Publication number
- JPS55105441A JPS55105441A JP1291779A JP1291779A JPS55105441A JP S55105441 A JPS55105441 A JP S55105441A JP 1291779 A JP1291779 A JP 1291779A JP 1291779 A JP1291779 A JP 1291779A JP S55105441 A JPS55105441 A JP S55105441A
- Authority
- JP
- Japan
- Prior art keywords
- oscillator
- frequency
- output
- mixer
- narrow band
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000001514 detection method Methods 0.000 title abstract 2
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
Landscapes
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
Abstract
PURPOSE:To increase the threshold level by giving the control to the central frequency of the narrow band filter of the AFC loop with the signal obtained by adding the phase detection output of PLL, the frequency discrimination output of the AFC loop and the external sweep output each. CONSTITUTION:The signal supplied to frequency mixer 1 is mixed with the output of voltage control oscillator 10 which is swept by high-speed sweep oscillator 12. In that case, oscillator 12 is set so as to give the sweep to the central frequency of narrow band pass filter 2a by the amount equal to the frequency deviation of oscillator 10. Thus the signal enters frequency discriminator 4 via amplitude limiter 3 and is then converted into the voltage equivalent to the input frequency deviation to be supplied to oscillator 10 via adder 8 and loop filter 9 each. On the other hand, the other output of mixer 1 is supplied to mixer 1 via narrow band pass filter 5, amplitude limiter 6, phase detector 7 and oscillator 10 each, and then PLL is formed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1291779A JPS55105441A (en) | 1979-02-06 | 1979-02-06 | Signal detection circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1291779A JPS55105441A (en) | 1979-02-06 | 1979-02-06 | Signal detection circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS55105441A true JPS55105441A (en) | 1980-08-13 |
Family
ID=11818688
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1291779A Pending JPS55105441A (en) | 1979-02-06 | 1979-02-06 | Signal detection circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55105441A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04189034A (en) * | 1990-11-22 | 1992-07-07 | Nec Corp | Phase locked loop pick-up circuit in common use with afc loop |
-
1979
- 1979-02-06 JP JP1291779A patent/JPS55105441A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH04189034A (en) * | 1990-11-22 | 1992-07-07 | Nec Corp | Phase locked loop pick-up circuit in common use with afc loop |
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