JPS5742146A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS5742146A
JPS5742146A JP11798480A JP11798480A JPS5742146A JP S5742146 A JPS5742146 A JP S5742146A JP 11798480 A JP11798480 A JP 11798480A JP 11798480 A JP11798480 A JP 11798480A JP S5742146 A JPS5742146 A JP S5742146A
Authority
JP
Japan
Prior art keywords
polycrystalline
layer
covered
providing
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11798480A
Other languages
Japanese (ja)
Inventor
Masami Matsumura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP11798480A priority Critical patent/JPS5742146A/en
Publication of JPS5742146A publication Critical patent/JPS5742146A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Bipolar Transistors (AREA)
  • Dicing (AREA)
  • Junction Field-Effect Transistors (AREA)

Abstract

PURPOSE:To obtain a mesa type pellet without cracks during the processes, by layering polycrystalline Si on an Si substrate, providing mesa grooves having a specified depth, covering the surface by a protecting film, providing a desired electrode on the surface, and providing isolation. CONSTITUTION:An N layer is formed on the entire Si surface having a P-N-P three layer structure, and said layer is covered with an SiO2 film 12. Polycrystalline Si 16 is grown on a P layer on the other surfce in gaseous phase. Heat treatment is performed at 800-900 deg.C. The surface concentration of the polycrystalline Si is about 10<19>/cm<2>, and the intimate adherence with electrode metal is enhanced. Then the polycrystalline Si is covered by a film 17 having etching resistant property. Holes are perforated in the SiO2 film 12 on the other surface, and the mesa grooves 13 are formed and covered by glass. Then electrode metal 14 is attached as usual, and the isolation is performed to obtain SCRs. In this constitution, the thickness of the thinnest part caused by the groove formation is about 0.1mm. or more, and the damage due to cracks in the substrate 11 can be reduced.
JP11798480A 1980-08-27 1980-08-27 Manufacture of semiconductor device Pending JPS5742146A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11798480A JPS5742146A (en) 1980-08-27 1980-08-27 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11798480A JPS5742146A (en) 1980-08-27 1980-08-27 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS5742146A true JPS5742146A (en) 1982-03-09

Family

ID=14725130

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11798480A Pending JPS5742146A (en) 1980-08-27 1980-08-27 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS5742146A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114171416A (en) * 2022-02-14 2022-03-11 浙江里阳半导体有限公司 TVS chip and glass passivation method and manufacturing method thereof

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50154071A (en) * 1974-05-27 1975-12-11
JPS51115777A (en) * 1975-03-26 1976-10-12 Hitachi Ltd Manufacturing method of a semiconductor apparatus
JPS52104072A (en) * 1976-02-27 1977-09-01 Hitachi Ltd High voltage semiconductor device
JPS52104071A (en) * 1976-02-27 1977-09-01 Hitachi Ltd Semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50154071A (en) * 1974-05-27 1975-12-11
JPS51115777A (en) * 1975-03-26 1976-10-12 Hitachi Ltd Manufacturing method of a semiconductor apparatus
JPS52104072A (en) * 1976-02-27 1977-09-01 Hitachi Ltd High voltage semiconductor device
JPS52104071A (en) * 1976-02-27 1977-09-01 Hitachi Ltd Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN114171416A (en) * 2022-02-14 2022-03-11 浙江里阳半导体有限公司 TVS chip and glass passivation method and manufacturing method thereof
CN114171416B (en) * 2022-02-14 2022-06-03 浙江里阳半导体有限公司 TVS chip and glass passivation method and manufacturing method thereof

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