JPS5739623A - Integrated circuit device - Google Patents

Integrated circuit device

Info

Publication number
JPS5739623A
JPS5739623A JP55115187A JP11518780A JPS5739623A JP S5739623 A JPS5739623 A JP S5739623A JP 55115187 A JP55115187 A JP 55115187A JP 11518780 A JP11518780 A JP 11518780A JP S5739623 A JPS5739623 A JP S5739623A
Authority
JP
Japan
Prior art keywords
circuit
pulse
integrated circuit
input terminal
timing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55115187A
Other languages
English (en)
Other versions
JPH0159550B2 (ja
Inventor
Hiroshi Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP55115187A priority Critical patent/JPS5739623A/ja
Publication of JPS5739623A publication Critical patent/JPS5739623A/ja
Publication of JPH0159550B2 publication Critical patent/JPH0159550B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G01R31/316—Testing of analog circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Logic Circuits (AREA)
JP55115187A 1980-08-21 1980-08-21 Integrated circuit device Granted JPS5739623A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55115187A JPS5739623A (en) 1980-08-21 1980-08-21 Integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55115187A JPS5739623A (en) 1980-08-21 1980-08-21 Integrated circuit device

Publications (2)

Publication Number Publication Date
JPS5739623A true JPS5739623A (en) 1982-03-04
JPH0159550B2 JPH0159550B2 (ja) 1989-12-18

Family

ID=14656503

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55115187A Granted JPS5739623A (en) 1980-08-21 1980-08-21 Integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5739623A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01227081A (ja) * 1988-03-07 1989-09-11 Sharp Corp 半導体集積回路
JPH04335858A (ja) * 1991-05-10 1992-11-24 Ezaki Glico Co Ltd 難結晶性糖液による糖蔵果実の製造法

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53121543A (en) * 1977-03-31 1978-10-24 Toshiba Corp Check circuit

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS53121543A (en) * 1977-03-31 1978-10-24 Toshiba Corp Check circuit

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01227081A (ja) * 1988-03-07 1989-09-11 Sharp Corp 半導体集積回路
JPH04335858A (ja) * 1991-05-10 1992-11-24 Ezaki Glico Co Ltd 難結晶性糖液による糖蔵果実の製造法

Also Published As

Publication number Publication date
JPH0159550B2 (ja) 1989-12-18

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