JPS5739442A - Input-output control system - Google Patents
Input-output control systemInfo
- Publication number
- JPS5739442A JPS5739442A JP55113832A JP11383280A JPS5739442A JP S5739442 A JPS5739442 A JP S5739442A JP 55113832 A JP55113832 A JP 55113832A JP 11383280 A JP11383280 A JP 11383280A JP S5739442 A JPS5739442 A JP S5739442A
- Authority
- JP
- Japan
- Prior art keywords
- nonready
- instruction
- input
- output device
- microinstruction
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K15/00—Arrangements for producing a permanent visual presentation of the output data, e.g. computer output printers
Landscapes
- Engineering & Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
Abstract
PURPOSE:To execute exchange of a form, etc. before an input/output device is started over again by an operator, by providing in advance a nonready instruction as a microinstruction, and immediately stopping an opration of the input/output device when said instruction has been read out. CONSTITUTION:A nonready instructon is provided in advance as a microinstruction. An electronic cmputer 1 reads out an instruction from a main memory 2 by a regular method, and executes the procesing. Now, when the nonready instruction is stored in an instruction register 4, a decoder 5 generates a nonready signal 7, and energizes an AND circuit 8 designated by an input/output device designating part in the instruction register 4. A line printer 9 receives a nonready command 11 thrugh an interface 10. When the nonready signal is received, a latch 13 is set. A controlling circuit 12 chooses the timing and immediately stops the line printer 9, and makes it a nonready state. It becomes a wait state until an operator pushes a start switch 14 and it is started again.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55113832A JPS5739442A (en) | 1980-08-19 | 1980-08-19 | Input-output control system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55113832A JPS5739442A (en) | 1980-08-19 | 1980-08-19 | Input-output control system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5739442A true JPS5739442A (en) | 1982-03-04 |
Family
ID=14622155
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55113832A Pending JPS5739442A (en) | 1980-08-19 | 1980-08-19 | Input-output control system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5739442A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0156392A2 (en) * | 1984-03-29 | 1985-10-02 | Tokyo Electric Co., Ltd. | Printing apparatus |
JPS6167125A (en) * | 1984-09-10 | 1986-04-07 | Hitachi Ltd | Word processor |
-
1980
- 1980-08-19 JP JP55113832A patent/JPS5739442A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0156392A2 (en) * | 1984-03-29 | 1985-10-02 | Tokyo Electric Co., Ltd. | Printing apparatus |
JPS6167125A (en) * | 1984-09-10 | 1986-04-07 | Hitachi Ltd | Word processor |
JPH0522932B2 (en) * | 1984-09-10 | 1993-03-31 | Hitachi Ltd |
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