JPS5587244A - Input-output operation display system - Google Patents

Input-output operation display system

Info

Publication number
JPS5587244A
JPS5587244A JP16421778A JP16421778A JPS5587244A JP S5587244 A JPS5587244 A JP S5587244A JP 16421778 A JP16421778 A JP 16421778A JP 16421778 A JP16421778 A JP 16421778A JP S5587244 A JPS5587244 A JP S5587244A
Authority
JP
Japan
Prior art keywords
input
program
display
output
instruction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP16421778A
Other languages
Japanese (ja)
Inventor
Kazuo Kumagai
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP16421778A priority Critical patent/JPS5587244A/en
Publication of JPS5587244A publication Critical patent/JPS5587244A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE: To let an I/O display unit provide automatic operation display via an input-output controller by an instruction, by providing the I/O display unit to an input-output device which needs manual operation of an operator on the basis of information from a high-order controller.
CONSTITUTION: Main frame 11 has a memory stored with input-output operation indication program 11-3 as instructions for display, input-output control program 11-1 for controlling I/Os 131W133, and program 11-2 controlling the operation of this system. Every time channel 11-4 is interrupted as program 11-2 advances, each instruction of program 11-3 is transferred to IOC12. Then IOC12, serving as a sub-system, decodes instruction codes from the main frame and one of I/Os 131W 13n brought under control is assigned, so that display data will be sent to one of I/O display units 141W14n of assigned I/O.
COPYRIGHT: (C)1980,JPO&Japio
JP16421778A 1978-12-25 1978-12-25 Input-output operation display system Pending JPS5587244A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP16421778A JPS5587244A (en) 1978-12-25 1978-12-25 Input-output operation display system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16421778A JPS5587244A (en) 1978-12-25 1978-12-25 Input-output operation display system

Publications (1)

Publication Number Publication Date
JPS5587244A true JPS5587244A (en) 1980-07-01

Family

ID=15788885

Family Applications (1)

Application Number Title Priority Date Filing Date
JP16421778A Pending JPS5587244A (en) 1978-12-25 1978-12-25 Input-output operation display system

Country Status (1)

Country Link
JP (1) JPS5587244A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5894024A (en) * 1981-11-30 1983-06-04 Fujitsu Ltd Displaying system for device assignment
JPH05216592A (en) * 1991-04-30 1993-08-27 Internatl Business Mach Corp <Ibm> Memory-device identifying method and remote memory system

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5894024A (en) * 1981-11-30 1983-06-04 Fujitsu Ltd Displaying system for device assignment
JPH0219502B2 (en) * 1981-11-30 1990-05-02 Fujitsu Ltd
JPH05216592A (en) * 1991-04-30 1993-08-27 Internatl Business Mach Corp <Ibm> Memory-device identifying method and remote memory system

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