JPS573141A - Memory device for pipeline operation - Google Patents
Memory device for pipeline operationInfo
- Publication number
- JPS573141A JPS573141A JP7545780A JP7545780A JPS573141A JP S573141 A JPS573141 A JP S573141A JP 7545780 A JP7545780 A JP 7545780A JP 7545780 A JP7545780 A JP 7545780A JP S573141 A JPS573141 A JP S573141A
- Authority
- JP
- Japan
- Prior art keywords
- cycle
- signals
- pipeline operation
- write
- memory device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F9/00—Arrangements for program control, e.g. control units
- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
- G06F9/22—Microcontrol or microprogram arrangements
- G06F9/28—Enhancement of operational speed, e.g. by using several microcontrol devices operating in parallel
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Advance Control (AREA)
Abstract
PURPOSE:To perform the pipeline operation smoothly, by completing decoding of a write address to an RAM in the preceding micro cycle and by writing data to the RAM immediately at the start of the current cycle. CONSTITUTION:One of signals 8c settled in the first micro cycle sends one of signals 8d, which became a write signal by a clock 8a and a write clock gate group 81, to a memory cell 56. Though writing is completed by this operation, R3 and R4 are read out from RAMs 50 and 51 respectively similarly to the first micro cycle in the processing (R3+R4 R5) where the operation is started from this cycle.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7545780A JPS573141A (en) | 1980-06-06 | 1980-06-06 | Memory device for pipeline operation |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP7545780A JPS573141A (en) | 1980-06-06 | 1980-06-06 | Memory device for pipeline operation |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS573141A true JPS573141A (en) | 1982-01-08 |
JPS6235142B2 JPS6235142B2 (en) | 1987-07-30 |
Family
ID=13576832
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP7545780A Granted JPS573141A (en) | 1980-06-06 | 1980-06-06 | Memory device for pipeline operation |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS573141A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58178470A (en) * | 1982-04-14 | 1983-10-19 | Hitachi Ltd | Memory controller |
JPS61123967A (en) * | 1984-11-21 | 1986-06-11 | Hitachi Ltd | Memory circuit |
JPS61156342A (en) * | 1984-12-28 | 1986-07-16 | Fujitsu Ltd | Semiconductor memory |
EP0398371A2 (en) * | 1989-05-19 | 1990-11-22 | Siemens Nixdorf Informationssysteme Aktiengesellschaft | Apparatus and method for the execution control of microprogrammed machine instructions in a data processing system |
-
1980
- 1980-06-06 JP JP7545780A patent/JPS573141A/en active Granted
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58178470A (en) * | 1982-04-14 | 1983-10-19 | Hitachi Ltd | Memory controller |
JPH0526235B2 (en) * | 1982-04-14 | 1993-04-15 | Hitachi Ltd | |
JPS61123967A (en) * | 1984-11-21 | 1986-06-11 | Hitachi Ltd | Memory circuit |
JPH0576655B2 (en) * | 1984-11-21 | 1993-10-25 | Hitachi Ltd | |
JPS61156342A (en) * | 1984-12-28 | 1986-07-16 | Fujitsu Ltd | Semiconductor memory |
EP0398371A2 (en) * | 1989-05-19 | 1990-11-22 | Siemens Nixdorf Informationssysteme Aktiengesellschaft | Apparatus and method for the execution control of microprogrammed machine instructions in a data processing system |
Also Published As
Publication number | Publication date |
---|---|
JPS6235142B2 (en) | 1987-07-30 |
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