JPS5730335A - Protection of wiring layer - Google Patents

Protection of wiring layer

Info

Publication number
JPS5730335A
JPS5730335A JP10427580A JP10427580A JPS5730335A JP S5730335 A JPS5730335 A JP S5730335A JP 10427580 A JP10427580 A JP 10427580A JP 10427580 A JP10427580 A JP 10427580A JP S5730335 A JPS5730335 A JP S5730335A
Authority
JP
Japan
Prior art keywords
wiring layer
radical
layer
semiconductor substrate
polyimide resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10427580A
Other languages
Japanese (ja)
Inventor
Shinetsu Fujieda
Shiyuichi Suzuki
Naoyuki Kokuni
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP10427580A priority Critical patent/JPS5730335A/en
Publication of JPS5730335A publication Critical patent/JPS5730335A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate
    • H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02118—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer carbon based polymeric organic or inorganic material, e.g. polyimides, poly cyclobutene or PVC

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Formation Of Insulating Films (AREA)

Abstract

PURPOSE:To increase the adhesive property for both the wiring layer provided on a semiconductor substrate and a resin film by a method wherein a hardened material layer, consisting of an organic zirconium compound and a silane delivative, is interposed between the wiring layer formed on the semiconductor substrate and the polyimide resin film. CONSTITUTION:On the Al wiring layer 3 provided on the semiconductor substrate 1 through the intermediary of an SiO2 film 2, a hardened material layer 4 of the composition consisting of the residue of the silane delivative having the residual radical of the organic zirconium compound of 20-80wt% and alkoxy radical, alkyl radical, amino radical, epoxy radical or the like, is formed, and then a polyimide resin layer 5 is covered on the hardened material layer 4. Through these procedures, the adhesiveness between the wiring layer 3 and the polyimide resin layer 5 is increased and the corrosion generating on the wiring layer can be prevented.
JP10427580A 1980-07-31 1980-07-31 Protection of wiring layer Pending JPS5730335A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10427580A JPS5730335A (en) 1980-07-31 1980-07-31 Protection of wiring layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10427580A JPS5730335A (en) 1980-07-31 1980-07-31 Protection of wiring layer

Publications (1)

Publication Number Publication Date
JPS5730335A true JPS5730335A (en) 1982-02-18

Family

ID=14376366

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10427580A Pending JPS5730335A (en) 1980-07-31 1980-07-31 Protection of wiring layer

Country Status (1)

Country Link
JP (1) JPS5730335A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017041508A (en) * 2015-08-18 2017-02-23 富士通株式会社 Semiconductor device and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017041508A (en) * 2015-08-18 2017-02-23 富士通株式会社 Semiconductor device and manufacturing method thereof
US10680073B2 (en) 2015-08-18 2020-06-09 Fujitsu Limited Semiconductor device and manufacturing method thereof

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