JPS5730328A - Method of forming high melting point metallic silicide layer - Google Patents
Method of forming high melting point metallic silicide layerInfo
- Publication number
- JPS5730328A JPS5730328A JP8590481A JP8590481A JPS5730328A JP S5730328 A JPS5730328 A JP S5730328A JP 8590481 A JP8590481 A JP 8590481A JP 8590481 A JP8590481 A JP 8590481A JP S5730328 A JPS5730328 A JP S5730328A
- Authority
- JP
- Japan
- Prior art keywords
- melting point
- high melting
- silicide layer
- forming high
- metallic silicide
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H10D64/01312—
-
- H10P14/6308—
-
- H10P50/283—
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/117—Oxidation, selective
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/14—Schottky barrier contacts
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/147—Silicides
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/911—Differential oxidation and etching
Landscapes
- Engineering & Computer Science (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Electrodes Of Semiconductors (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Physics & Mathematics (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Weting (AREA)
- General Chemical & Material Sciences (AREA)
- Inorganic Chemistry (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US06/164,464 US4285761A (en) | 1980-06-30 | 1980-06-30 | Process for selectively forming refractory metal silicide layers on semiconductor devices |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5730328A true JPS5730328A (en) | 1982-02-18 |
| JPS6152595B2 JPS6152595B2 (enExample) | 1986-11-13 |
Family
ID=22594608
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8590481A Granted JPS5730328A (en) | 1980-06-30 | 1981-06-05 | Method of forming high melting point metallic silicide layer |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US4285761A (enExample) |
| EP (1) | EP0043451B1 (enExample) |
| JP (1) | JPS5730328A (enExample) |
| DE (1) | DE3175507D1 (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59129471A (ja) * | 1983-01-14 | 1984-07-25 | Toshiba Corp | 半導体装置の製造方法 |
| JP2001148356A (ja) * | 1999-10-07 | 2001-05-29 | Samsung Electronics Co Ltd | チャンファが形成された金属シリサイド層を備えた半導体素子の製造方法 |
Families Citing this family (45)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4364166A (en) * | 1979-03-01 | 1982-12-21 | International Business Machines Corporation | Semiconductor integrated circuit interconnections |
| JPS5679449A (en) * | 1979-11-30 | 1981-06-30 | Mitsubishi Electric Corp | Production of semiconductor device |
| US4337476A (en) * | 1980-08-18 | 1982-06-29 | Bell Telephone Laboratories, Incorporated | Silicon rich refractory silicides as gate metal |
| NL186352C (nl) * | 1980-08-27 | 1990-11-01 | Philips Nv | Werkwijze ter vervaardiging van een halfgeleiderinrichting. |
| US4445134A (en) * | 1980-12-08 | 1984-04-24 | Ibm Corporation | Conductivity WSi2 films by Pt preanneal layering |
| US4488166A (en) * | 1980-12-09 | 1984-12-11 | Fairchild Camera & Instrument Corp. | Multilayer metal silicide interconnections for integrated circuits |
| US4472237A (en) * | 1981-05-22 | 1984-09-18 | At&T Bell Laboratories | Reactive ion etching of tantalum and silicon |
| US4378628A (en) * | 1981-08-27 | 1983-04-05 | Bell Telephone Laboratories, Incorporated | Cobalt silicide metallization for semiconductor integrated circuits |
| US4398341A (en) * | 1981-09-21 | 1983-08-16 | International Business Machines Corp. | Method of fabricating a highly conductive structure |
| US4394182A (en) * | 1981-10-14 | 1983-07-19 | Rockwell International Corporation | Microelectronic shadow masking process for reducing punchthrough |
| DE3211752C2 (de) * | 1982-03-30 | 1985-09-26 | Siemens AG, 1000 Berlin und 8000 München | Verfahren zum selektiven Abscheiden von aus Siliziden hochschmelzender Metalle bestehenden Schichtstrukturen auf im wesentlichen aus Silizium bestehenden Substraten und deren Verwendung |
| JPS59100520A (ja) * | 1982-11-30 | 1984-06-09 | Fujitsu Ltd | 半導体装置の製造方法 |
| US4443930A (en) * | 1982-11-30 | 1984-04-24 | Ncr Corporation | Manufacturing method of silicide gates and interconnects for integrated circuits |
| US4411734A (en) * | 1982-12-09 | 1983-10-25 | Rca Corporation | Etching of tantalum silicide/doped polysilicon structures |
| US4514893A (en) * | 1983-04-29 | 1985-05-07 | At&T Bell Laboratories | Fabrication of FETs |
| US4454002A (en) * | 1983-09-19 | 1984-06-12 | Harris Corporation | Controlled thermal-oxidation thinning of polycrystalline silicon |
| US4490193A (en) * | 1983-09-29 | 1984-12-25 | International Business Machines Corporation | Method for making diffusions into a substrate and electrical connections thereto using rare earth boride materials |
| US4481046A (en) * | 1983-09-29 | 1984-11-06 | International Business Machines Corporation | Method for making diffusions into a substrate and electrical connections thereto using silicon containing rare earth hexaboride materials |
| JPS60132353A (ja) * | 1983-12-20 | 1985-07-15 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
| JPS60130844A (ja) * | 1983-12-20 | 1985-07-12 | Toshiba Corp | 半導体装置の製造方法 |
| US4673968A (en) * | 1985-07-02 | 1987-06-16 | Siemens Aktiengesellschaft | Integrated MOS transistors having a gate metallization composed of tantalum or niobium or their silicides |
| US4660276A (en) * | 1985-08-12 | 1987-04-28 | Rca Corporation | Method of making a MOS field effect transistor in an integrated circuit |
| JPS6252551A (ja) * | 1985-08-30 | 1987-03-07 | Mitsubishi Electric Corp | フオトマスク材料 |
| JPH0616556B2 (ja) * | 1987-04-14 | 1994-03-02 | 株式会社東芝 | 半導体装置 |
| JPS6489470A (en) * | 1987-09-30 | 1989-04-03 | Mitsubishi Electric Corp | Manufacture of semiconductor device |
| US4774201A (en) * | 1988-01-07 | 1988-09-27 | Intel Corporation | Tungsten-silicide reoxidation technique using a CVD oxide cap |
| US4833099A (en) * | 1988-01-07 | 1989-05-23 | Intel Corporation | Tungsten-silicide reoxidation process including annealing in pure nitrogen and subsequent oxidation in oxygen |
| JP2624797B2 (ja) * | 1988-09-20 | 1997-06-25 | 株式会社日立製作所 | アクティブマトリクス基板の製造方法 |
| JPH0265695U (enExample) * | 1988-11-08 | 1990-05-17 | ||
| US5093274A (en) * | 1990-02-02 | 1992-03-03 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and method for manufacture thereof |
| KR950003233B1 (ko) * | 1992-05-30 | 1995-04-06 | 삼성전자 주식회사 | 이중층 실리사이드 구조를 갖는 반도체 장치 및 그 제조방법 |
| US5334545A (en) * | 1993-02-01 | 1994-08-02 | Allied Signal Inc. | Process for forming self-aligning cobalt silicide T-gates of silicon MOS devices |
| KR100190105B1 (ko) * | 1996-10-24 | 1999-07-01 | 윤종용 | 게이트전극의 제조방법 및 그에 따라 제조된 게이트구조 |
| US6897105B1 (en) * | 1998-09-16 | 2005-05-24 | Texas Instrument Incorporated | Method of forming metal oxide gate structures and capacitor electrodes |
| US6448140B1 (en) * | 1999-02-08 | 2002-09-10 | Taiwan Semiconductor Manufacturing Company | Laterally recessed tungsten silicide gate structure used with a self-aligned contact structure including a straight walled sidewall spacer while filling recess |
| KR100295061B1 (ko) * | 1999-03-29 | 2001-07-12 | 윤종용 | 챔퍼가 형성된 실리사이드층을 갖춘 반도체소자 및 그 제조방법 |
| US6372618B2 (en) * | 2000-01-06 | 2002-04-16 | Micron Technology, Inc. | Methods of forming semiconductor structures |
| KR100450749B1 (ko) * | 2001-12-28 | 2004-10-01 | 한국전자통신연구원 | 어븀이 도핑된 실리콘 나노 점 어레이 제조 방법 및 이에이용되는 레이저 기화 증착 장비 |
| US7125815B2 (en) * | 2003-07-07 | 2006-10-24 | Micron Technology, Inc. | Methods of forming a phosphorous doped silicon dioxide comprising layer |
| US7056780B2 (en) * | 2003-07-18 | 2006-06-06 | Intel Corporation | Etching metal silicides and germanides |
| US7510966B2 (en) * | 2005-03-07 | 2009-03-31 | Micron Technology, Inc. | Electrically conductive line, method of forming an electrically conductive line, and method of reducing titanium silicide agglomeration in fabrication of titanium silicide over polysilicon transistor gate lines |
| EP2683792B1 (en) | 2011-03-11 | 2019-09-25 | FujiFilm Electronic Materials USA, Inc. | Novel etching composition |
| TWI577834B (zh) | 2011-10-21 | 2017-04-11 | 富士軟片電子材料美國股份有限公司 | 新穎的鈍化組成物及方法 |
| US8709277B2 (en) | 2012-09-10 | 2014-04-29 | Fujifilm Corporation | Etching composition |
| US10741560B2 (en) * | 2017-10-26 | 2020-08-11 | International Business Machines Corporation | High resistance readout FET for cognitive device |
Family Cites Families (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| GB1501114A (en) * | 1974-04-25 | 1978-02-15 | Rca Corp | Method of making a semiconductor device |
| US4180596A (en) * | 1977-06-30 | 1979-12-25 | International Business Machines Corporation | Method for providing a metal silicide layer on a substrate |
| US4090915A (en) * | 1977-08-12 | 1978-05-23 | Rca Corporation | Forming patterned polycrystalline silicon |
| US4141022A (en) * | 1977-09-12 | 1979-02-20 | Signetics Corporation | Refractory metal contacts for IGFETS |
| US4128670A (en) * | 1977-11-11 | 1978-12-05 | International Business Machines Corporation | Fabrication method for integrated circuits with polysilicon lines having low sheet resistance |
| IT1110843B (it) * | 1978-02-27 | 1986-01-06 | Rca Corp | Contatto affondato per dispositivi mos di tipo complementare |
| DE2815605C3 (de) * | 1978-04-11 | 1981-04-16 | Siemens AG, 1000 Berlin und 8000 München | Halbleiterspeicher mit Ansteuerleitungen hoher Leitfähigkeit |
| US4276557A (en) * | 1978-12-29 | 1981-06-30 | Bell Telephone Laboratories, Incorporated | Integrated semiconductor circuit structure and method for making it |
| US4228212A (en) * | 1979-06-11 | 1980-10-14 | General Electric Company | Composite conductive structures in integrated circuits |
-
1980
- 1980-06-30 US US06/164,464 patent/US4285761A/en not_active Expired - Lifetime
-
1981
- 1981-06-05 JP JP8590481A patent/JPS5730328A/ja active Granted
- 1981-06-05 DE DE8181104336T patent/DE3175507D1/de not_active Expired
- 1981-06-05 EP EP81104336A patent/EP0043451B1/en not_active Expired
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59129471A (ja) * | 1983-01-14 | 1984-07-25 | Toshiba Corp | 半導体装置の製造方法 |
| JP2001148356A (ja) * | 1999-10-07 | 2001-05-29 | Samsung Electronics Co Ltd | チャンファが形成された金属シリサイド層を備えた半導体素子の製造方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US4285761A (en) | 1981-08-25 |
| EP0043451A2 (en) | 1982-01-13 |
| EP0043451A3 (en) | 1984-07-25 |
| EP0043451B1 (en) | 1986-10-22 |
| DE3175507D1 (en) | 1986-11-27 |
| JPS6152595B2 (enExample) | 1986-11-13 |
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