JPS5727500A - Memory capacity detecting system - Google Patents
Memory capacity detecting systemInfo
- Publication number
- JPS5727500A JPS5727500A JP10153380A JP10153380A JPS5727500A JP S5727500 A JPS5727500 A JP S5727500A JP 10153380 A JP10153380 A JP 10153380A JP 10153380 A JP10153380 A JP 10153380A JP S5727500 A JPS5727500 A JP S5727500A
- Authority
- JP
- Japan
- Prior art keywords
- clear
- memory
- address
- processing
- final
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/06—Addressing a physical block of locations, e.g. base addressing, module addressing, memory dedication
- G06F12/0646—Configuration or reconfiguration
- G06F12/0684—Configuration or reconfiguration with feedback, e.g. presence or absence of unit detected by addressing, overflow detection
Abstract
PURPOSE:To prevent the production in the secondary failure based on the mis- judgement of a memory capacity, by detecting the memory mounting capacity automatically, through the use of a memory clear processing with a clear routine. CONSTITUTION:A memory clear processing is executed according to a clear routine program stored in a memory device 1, and when the clear processing to the memory card 3-n at the final stage is finished, the renewal address as the result of address renewal processing of the clear address corresponding to the final address location of the memory card 3-n does not belong to any of memory cards 3-1, 3-2-3-n causing stop of the address renewal processing. Further, comparing the loading memory capacity data at present with the final clear address information of the memory card 3-n detected with the said clear end signal nonoutput state, and if they are coincided, the said final clear address, that is, loaded capacity data is stored in the fixed address on the memory device 1.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10153380A JPS5727500A (en) | 1980-07-24 | 1980-07-24 | Memory capacity detecting system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10153380A JPS5727500A (en) | 1980-07-24 | 1980-07-24 | Memory capacity detecting system |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS5727500A true JPS5727500A (en) | 1982-02-13 |
JPS6346461B2 JPS6346461B2 (en) | 1988-09-14 |
Family
ID=14303081
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10153380A Granted JPS5727500A (en) | 1980-07-24 | 1980-07-24 | Memory capacity detecting system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5727500A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6121580A (en) * | 1984-07-03 | 1986-01-30 | Fujitsu Ltd | Reading control system of forms |
US4982378A (en) * | 1986-12-06 | 1991-01-01 | Tokyo Electric Co., Ltd. | Memory capacity detecting device for memory cards |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0211157U (en) * | 1988-06-30 | 1990-01-24 |
-
1980
- 1980-07-24 JP JP10153380A patent/JPS5727500A/en active Granted
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6121580A (en) * | 1984-07-03 | 1986-01-30 | Fujitsu Ltd | Reading control system of forms |
US4982378A (en) * | 1986-12-06 | 1991-01-01 | Tokyo Electric Co., Ltd. | Memory capacity detecting device for memory cards |
Also Published As
Publication number | Publication date |
---|---|
JPS6346461B2 (en) | 1988-09-14 |
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