JPS5724570A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5724570A
JPS5724570A JP9968580A JP9968580A JPS5724570A JP S5724570 A JPS5724570 A JP S5724570A JP 9968580 A JP9968580 A JP 9968580A JP 9968580 A JP9968580 A JP 9968580A JP S5724570 A JPS5724570 A JP S5724570A
Authority
JP
Japan
Prior art keywords
electrode
capacitor
gain
source
leads
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP9968580A
Other languages
Japanese (ja)
Other versions
JPS6241420B2 (en
Inventor
Masahiro Hayakawa
Shizuka Jodai
Yutaka Hirano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP9968580A priority Critical patent/JPS5724570A/en
Publication of JPS5724570A publication Critical patent/JPS5724570A/en
Publication of JPS6241420B2 publication Critical patent/JPS6241420B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Abstract

PURPOSE:To obtain an FET having an input matching circuit operable at up to a high frequency and with a high gain, by forming an opening at the electrode of a source earthing capacitor, and placing a capacitor electrode for matching an input impedance in the opening. CONSTITUTION:An electrode 22 forming a source earthing capacitor C4 is formed into an annular shape, and electrodes 32a, 32b of a matching capacitor are formed at in its openings 22a, 22b. (l7, l8 are source leads, and l2, l3, l4 are gate leads). The inductance components of the respective leads and the capacitance consisting of the respective electrodes form an input impedance matching circuit. Because the earthing capacitor electrode 22 is formed into an annular shape, the electrode has not any open ends. Accordingly, it is possible to readily obtain a high- frequency and high-gain FET having no dip in the gain-frequency characteristic.
JP9968580A 1980-07-21 1980-07-21 Semiconductor device Granted JPS5724570A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9968580A JPS5724570A (en) 1980-07-21 1980-07-21 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9968580A JPS5724570A (en) 1980-07-21 1980-07-21 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS5724570A true JPS5724570A (en) 1982-02-09
JPS6241420B2 JPS6241420B2 (en) 1987-09-02

Family

ID=14253887

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9968580A Granted JPS5724570A (en) 1980-07-21 1980-07-21 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS5724570A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH01153823U (en) * 1988-04-18 1989-10-23
JP5181424B2 (en) * 2006-03-28 2013-04-10 富士通株式会社 High power amplifier

Also Published As

Publication number Publication date
JPS6241420B2 (en) 1987-09-02

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