JPS5762547A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS5762547A
JPS5762547A JP55139475A JP13947580A JPS5762547A JP S5762547 A JPS5762547 A JP S5762547A JP 55139475 A JP55139475 A JP 55139475A JP 13947580 A JP13947580 A JP 13947580A JP S5762547 A JPS5762547 A JP S5762547A
Authority
JP
Japan
Prior art keywords
capacitance
circuit
internal matching
inductance
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55139475A
Other languages
Japanese (ja)
Other versions
JPS6043021B2 (en
Inventor
Yasuro Mitsui
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP55139475A priority Critical patent/JPS6043021B2/en
Publication of JPS5762547A publication Critical patent/JPS5762547A/en
Publication of JPS6043021B2 publication Critical patent/JPS6043021B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/58Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64Impedance arrangements
    • H01L23/66High-frequency adaptations
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64Impedance arrangements
    • H01L2223/66High-frequency adaptations
    • H01L2223/6644Packaging aspects of high-frequency amplifiers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/102Material of the semiconductor or solid state bodies
    • H01L2924/1025Semiconducting materials
    • H01L2924/1026Compound semiconductors
    • H01L2924/1032III-V
    • H01L2924/10329Gallium arsenide [GaAs]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Amplifiers (AREA)

Abstract

PURPOSE:To improve the frequency characteristics of a semiconductor device by forming two capacitance electrodes on the same dielectric substrate, thereby remarkably shortening the size of the circuit and improving the amplifying gain of a multi-stage amplifier circuit. CONSTITUTION:The first and second semiconductor chips 1A, 1B of a GaAsFET are formed by using a concentrated constant internal matching element. The first output internal matching circuit is composed of a capacitance with the first electrode 26 formed on a dielectric substrate 25 and an inductance with a bonding wire 28, and the second input internal matching circuit is composed of a capacitance with the second electrode 29 and an inductance with a bonding wire 31. A gap condenser is formed by forming a fine slit 32 between the two capacitance electrodes 26 and 29 formed on the same substrate 25, the output and input matching circuits are isolated in a DC manner, and are densely coupled in RF manner.
JP55139475A 1980-10-03 1980-10-03 semiconductor equipment Expired JPS6043021B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55139475A JPS6043021B2 (en) 1980-10-03 1980-10-03 semiconductor equipment

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55139475A JPS6043021B2 (en) 1980-10-03 1980-10-03 semiconductor equipment

Publications (2)

Publication Number Publication Date
JPS5762547A true JPS5762547A (en) 1982-04-15
JPS6043021B2 JPS6043021B2 (en) 1985-09-26

Family

ID=15246103

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55139475A Expired JPS6043021B2 (en) 1980-10-03 1980-10-03 semiconductor equipment

Country Status (1)

Country Link
JP (1) JPS6043021B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5884510A (en) * 1981-10-29 1983-05-20 ワトキンズ・ジヨンソン・コムパニ− Rf amplifying circuit using fet device
JP2012182306A (en) * 2011-03-01 2012-09-20 Toshiba Corp Package for mmic

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5884510A (en) * 1981-10-29 1983-05-20 ワトキンズ・ジヨンソン・コムパニ− Rf amplifying circuit using fet device
JP2012182306A (en) * 2011-03-01 2012-09-20 Toshiba Corp Package for mmic

Also Published As

Publication number Publication date
JPS6043021B2 (en) 1985-09-26

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