JPS6241420B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device that operates in a self-biased manner and is suitable for ultra-high frequency applications.

In a microwave semiconductor device using a GaAs FET, a positive voltage is applied to the drain of the transistor, the source is grounded, and a negative voltage is applied to the gate, but this method requires two power supplies. Therefore, if the source is grounded through a parallel circuit of a resistor and a capacitor, a so-called self-bias method is achieved, which eliminates the need to apply a negative voltage to the gate and allows operation with a single power supply. By the way, at high frequencies, the inductance of the lead wire cannot be ignored, so in order for the capacitor to operate effectively, it is necessary to place the capacitor as close as possible to the transistor.For this purpose, the transistor and the capacitor electrode are placed on the substrate. It is considered to be closely juxtaposed. However, in this juxtaposition method, the gate electrode wiring straddles the capacitor electrode, which increases the wire length and increases the inductance.On the other hand, the input impedance of ultra-high frequency transistors is extremely small, so matching is impossible as it is. is difficult to remove. Therefore, a capacitor of an appropriate value is inserted into the input circuit according to its inductance.

An equivalent circuit of such a semiconductor device is shown in FIG. 1, and a specific example is shown in FIG.

In this example, a GaAs chip with a four-cell structure on one chip is used.
Using FETs, two cells are combined into one FET, and a two-stage low-pass filter is provided at the gate input section for input matching. L ₁ and C ₁ , L ₂ and L ₄
C ₂ , L ₃ and L ₅ and C ₃ are its low-pass filters, inductances L ₁ to L ₅ are due to lead wires l ₁ to l ₅ , capacitors C ₁ , C ₂ , C ₃ are electrodes 18,
32a, 32b, the insulating film thereunder, and the ground conductor substrate 12 further below. The E-shaped electrode 22 is the electrode of a capacitor _C4 that AC-grounds the sources of the FETs 10a and 10b, and this capacitor _C4 is composed of the electrode 22, an insulating film below it, and a grounding conductor substrate 12 below it. be done.
A capacitor chip _C4 having such electrodes 32a, 32b, and 22 is arranged parallel to the transistor chip 20 on the substrate 12, and the lead wires are connected as shown.
Connected by l ₁ to _{l 8} . 26, 28, and 30 are package leads for the drain, gate, and source,
14 is a ceramic plate for insulating the leads.

In this type of transistor, the capacitor electrode is connected to the transistor chip 2 for both source grounding and input matching.
0 as close as possible, and the connection lines l ₄ , l ₅ , and l ₈ to the transistors do not need to go over the capacitor electrode, but the ground inductance does not drop sufficiently and the expected gain cannot be obtained. The problem is that there is no. This is due to the fact that the path length of the signal current passing through the electrode 22 of the grounding capacitor _C4 is large.
That is, the path from the source package lead 30 to the source electrode of the transistor through both ends of the electrode 22 of the grounding capacitor _C4 and the lead wires on _both sides is short, but the path from the center part of the capacitor electrode and the lead wires on both sides is _short. The path to the source electrode of the transistor is long because it passes through P ₁ , P ₂ , P ₃ , and P ₄ . To give a specific example, capacitor electrode 2
2 has a size of about 1 mm x 2 mm, so the path length is about 3 mm. In this type of circuit, where the wavelength of the signal current is λ, the circuit is capacitive when the path length is less than λ/4, becomes short-circuited at λ/4, and becomes inductive when it exceeds λ/4. If the signal frequency is 6GHz, the wavelength in vacuum is 50mm, so λ/4 is 12.5mm,
In a medium with dielectric constant ε, the dielectric constant decreases to 1/√, so if ε of the capacitor dielectric is 140, λ/4 is approximately 1
mm. Therefore, the central portion of the capacitor electrode becomes inductive and does not operate as a capacitor.

Therefore, as shown in Figure 3, a grounding capacitor is
We considered arranging the C ₄ electrode 22 in the opposite direction to that shown in FIG. This shortens the signal current path length, reduces ground inductance, and reduces gain.
It increased by about 2dB. However, a sharp dip (about -5 dB) occurs in the gain near 6 GHz.

Therefore, the present invention provides the electrode 2 of the grounding capacitor C ₄
This is an attempt to eliminate the dip by further improving the shape of 2, and its feature is that the semiconductor chip on which the field effect transistor is constructed and the electrodes of the capacitors for source grounding and input impedance matching of the transistor are connected to the substrate. In the semiconductor devices arranged in parallel above, an opening is provided in the electrode of the source grounding capacitor, and the electrode of the input impedance matching capacitor is disposed within the opening.

As mentioned above, in the capacitor electrode of FIG. 3, the ground inductance is reduced and the overall gain increases by about 2 dB, but a sharp dip occurs in the gain-frequency characteristic. The center frequency of this dip is the leg length L of the electrode 22 of the E-shaped grounding capacitor _C4 , that is, a, b
It changes depending on the length of the interval, and as L becomes larger, the frequency decreases. The reason for this is thought to be as follows. The dielectric film of the grounding capacitor chip _C4 has a relative dielectric constant εr=
140 with a thickness of 0.15 mm and L=1.25 mm, this length L corresponds to λ/4 of 6 GHz.
Since point b is an open end, point a is a shorted end. On the other hand, since the input matching capacitors C ₂ and C ₃ and the high frequency grounding capacitor C ₄ are arranged close to each other, the coupling between these two capacitors cannot be ignored. Due to this coupling, the high frequency input is bypassed to the grounding capacitor _C4 and does not reach the transistor, reducing the gain. Furthermore, since the grounding capacitor _C4 effectively changes from capacitive to inductive at around λ/4, gain ripple etc. are likely to occur.

Therefore, in the present invention, the electrode 22 of the grounding capacitor _C4 is made into an annular shape as shown in FIG.
2a and 32b were provided. Where I did this, the third
There was no gain ripple as in the case shown in the figure, and there was no decrease in gain. This is thought to be due to the fact that it does not have an open end like the capacitor electrode in FIG. 3.

As explained above, according to the present invention, a self-biasing FET with an input matching circuit can be constructed by simply making the grounding capacitor electrode into an annular shape.
It can operate up to high frequencies with high gain without dips, and is extremely effective.

[Brief explanation of the drawing]

FIG. 1 is an equivalent circuit diagram of a semiconductor device targeted by the present invention, and FIG. 2 is a schematic plan view showing a specific example thereof.
FIG. 3 is a partial plan view showing an improved example, and FIG. 4 is a partial plan view showing an embodiment of the present invention. In the drawing, 20 is a semiconductor chip, C ₂ and C ₄ are input matching capacitors, 32 a and 32 b are their electrodes,
C ₄ is a grounding capacitor, 22 is its electrode, 22
a and 22b are the openings thereof, and 12 is the substrate.

Claims (1)

[Claims] 1. In a semiconductor device in which a semiconductor chip in which a field effect transistor is configured and electrodes of capacitors for source grounding and input impedance matching of the transistor are arranged side by side on a substrate, an opening is provided in the electrode of the source grounding capacitor. . A semiconductor device, characterized in that a capacitor electrode for input impedance matching is disposed within the opening.