JPS5723244A - Formation of multilayered wiring pattern - Google Patents

Formation of multilayered wiring pattern

Info

Publication number
JPS5723244A
JPS5723244A JP9823280A JP9823280A JPS5723244A JP S5723244 A JPS5723244 A JP S5723244A JP 9823280 A JP9823280 A JP 9823280A JP 9823280 A JP9823280 A JP 9823280A JP S5723244 A JPS5723244 A JP S5723244A
Authority
JP
Japan
Prior art keywords
openings
wiring
wirings
pattern
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9823280A
Other languages
Japanese (ja)
Inventor
Kazumitsu Matsuzawa
Tsutomu Ishikawa
Noboru Onishi
Tadaaki Masumori
Nobuo Muto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP9823280A priority Critical patent/JPS5723244A/en
Publication of JPS5723244A publication Critical patent/JPS5723244A/en
Pending legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To enable connective wiring of various channel with a single mask pattern by providing a method having the steps of forming a lower distribution layer and openings on a interlayers film with a standardized pattern and connecting and cutting unnecessary portion in lower wiring layer with a pattern of an upper wiring. CONSTITUTION:Lower layer wirings A1-A4 are formed continuously in the direction of X, for example, on which an insulator film 3 and openings H11-H44 are provided with fixed intervals. A metal layer is formed on the whole surface and etched with a pattern of distribution layer b1-b5 connecting wiring A2, A4 with openings H23, H43 and supplementary connecting member K21, K22, K44. At openings H24, H41, H42, unnecessary portion of lower layer wiring A2, A4 are cut to from a desired connecting wirings. This method can be applied for various purposes, for example; providing a structure of double layered standardized one wherein lower layered wirings are connected at the openings being made at places other than crossed parts, and on said structure, the insulaion films are formed having standardized openings followed by patterning. Thereby, enabling the high density wirings using a single mask pattern.
JP9823280A 1980-07-18 1980-07-18 Formation of multilayered wiring pattern Pending JPS5723244A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9823280A JPS5723244A (en) 1980-07-18 1980-07-18 Formation of multilayered wiring pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9823280A JPS5723244A (en) 1980-07-18 1980-07-18 Formation of multilayered wiring pattern

Publications (1)

Publication Number Publication Date
JPS5723244A true JPS5723244A (en) 1982-02-06

Family

ID=14214206

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9823280A Pending JPS5723244A (en) 1980-07-18 1980-07-18 Formation of multilayered wiring pattern

Country Status (1)

Country Link
JP (1) JPS5723244A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04135717U (en) * 1991-06-06 1992-12-17 株式会社ニコン Turret type condenser device for optical microscope
US8223428B2 (en) 2008-07-04 2012-07-17 Olympus Corporation Microscope
US8270072B2 (en) 2008-07-04 2012-09-18 Olympus Corporation Microscope having an optical-element switching operation unit configured to rotate a movable element equipped with a plurality of optical elements by a single translatory operation

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04135717U (en) * 1991-06-06 1992-12-17 株式会社ニコン Turret type condenser device for optical microscope
US8223428B2 (en) 2008-07-04 2012-07-17 Olympus Corporation Microscope
US8270072B2 (en) 2008-07-04 2012-09-18 Olympus Corporation Microscope having an optical-element switching operation unit configured to rotate a movable element equipped with a plurality of optical elements by a single translatory operation

Similar Documents

Publication Publication Date Title
DE2554536A1 (en) METHOD OF DETERMINING CHARACTERISTIC SIZES OF FLAT LADDER
JPS5334484A (en) Forming method for multi layer wiring
JPS5737365A (en) Ion current control electrode
JPS5723244A (en) Formation of multilayered wiring pattern
JPS52149990A (en) Production of multilayer wirings
FR2357072A1 (en) Connector for multiple layer integrated circuit assembly - uses signal layer substrate with signal conductive pattern on both sides with trough conductors
JPS5731155A (en) Manufacture of semiconductor device
EP0227189A3 (en) Method of manufacturing a thin conductor device
JPS5772357A (en) Mounting method of integrated circuit
JPS5779647A (en) Master slice chip
JPS5368184A (en) Formation method of multilayer wiring structure
JPS55151366A (en) Fabricating method of semiconductor device
JPS5772331A (en) Manufacture of semiconductor device
JPS5432976A (en) Hard mask for electron beam
JPS577949A (en) Multilayer wiring method
JPS5326691A (en) Multi-layer wiring struc ture
JPS56155551A (en) Semiconductor device
JPS57106146A (en) Forming method for multilayer wire
JPS5353989A (en) Production of semiconductor device
JPS56133849A (en) Semiconductor device
JPS56152250A (en) Multilayer wiring method
JPS55138254A (en) Manufacture of semiconductor device
JPS5368183A (en) Production of semiconductor device
JPS57153435A (en) Manufacture of semiconductor device
JPS5690535A (en) Production of integrated multilayer wiring strcuture