JPS5779647A - Master slice chip - Google Patents

Master slice chip

Info

Publication number
JPS5779647A
JPS5779647A JP55155433A JP15543380A JPS5779647A JP S5779647 A JPS5779647 A JP S5779647A JP 55155433 A JP55155433 A JP 55155433A JP 15543380 A JP15543380 A JP 15543380A JP S5779647 A JPS5779647 A JP S5779647A
Authority
JP
Japan
Prior art keywords
wiring
regions
master slice
slice chip
extending
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP55155433A
Other languages
Japanese (ja)
Inventor
Hideyuki Miyazawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ricoh Co Ltd
Original Assignee
Ricoh Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ricoh Co Ltd filed Critical Ricoh Co Ltd
Priority to JP55155433A priority Critical patent/JPS5779647A/en
Publication of JPS5779647A publication Critical patent/JPS5779647A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/90—Masterslice integrated circuits

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)

Abstract

PURPOSE:To facilitate wiring between semiconductor elements by a method wherein the first buried wiring layers extending in the first direction and the second buried wiring layers having the different direction are provided in the wiring regions to be interposed between plural element regions of a master slice chip. CONSTITUTION:The first wiring block 5 consisting of the first under paths 3 extending in the first direction and the second wiring block 6 consisting of the second under paths 4 extending in the direction being different from the first direction are formed in the wiring regions 1b of the master slice chip 1 being provided with plural element regions 1a and the wiring regions 1b provided between the former, and the prescribed under paths are selected to connect between the elements. Accordingly degree of freedom in use of the under paths is enlarged, and delay time of signal can be regulated minutely.
JP55155433A 1980-11-05 1980-11-05 Master slice chip Pending JPS5779647A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55155433A JPS5779647A (en) 1980-11-05 1980-11-05 Master slice chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55155433A JPS5779647A (en) 1980-11-05 1980-11-05 Master slice chip

Publications (1)

Publication Number Publication Date
JPS5779647A true JPS5779647A (en) 1982-05-18

Family

ID=15605910

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55155433A Pending JPS5779647A (en) 1980-11-05 1980-11-05 Master slice chip

Country Status (1)

Country Link
JP (1) JPS5779647A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4733288A (en) * 1982-06-30 1988-03-22 Fujitsu Limited Gate-array chip
JPS63258042A (en) * 1987-04-15 1988-10-25 Nec Kyushu Ltd semiconductor equipment
JPH02164064A (en) * 1988-12-19 1990-06-25 Rohm Co Ltd Manufacturing method of semiconductor integrated circuit
US5185283A (en) * 1987-10-22 1993-02-09 Matsushita Electronics Corporation Method of making master slice type integrated circuit device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4733288A (en) * 1982-06-30 1988-03-22 Fujitsu Limited Gate-array chip
JPS63258042A (en) * 1987-04-15 1988-10-25 Nec Kyushu Ltd semiconductor equipment
US5185283A (en) * 1987-10-22 1993-02-09 Matsushita Electronics Corporation Method of making master slice type integrated circuit device
JPH02164064A (en) * 1988-12-19 1990-06-25 Rohm Co Ltd Manufacturing method of semiconductor integrated circuit

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