JPS57210741A - Transmission speed converting system for digital data - Google Patents

Transmission speed converting system for digital data

Info

Publication number
JPS57210741A
JPS57210741A JP56094029A JP9402981A JPS57210741A JP S57210741 A JPS57210741 A JP S57210741A JP 56094029 A JP56094029 A JP 56094029A JP 9402981 A JP9402981 A JP 9402981A JP S57210741 A JPS57210741 A JP S57210741A
Authority
JP
Japan
Prior art keywords
signal
latch circuit
data
converted
transmission speed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56094029A
Other languages
Japanese (ja)
Inventor
Yoshitaka Katayama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP56094029A priority Critical patent/JPS57210741A/en
Publication of JPS57210741A publication Critical patent/JPS57210741A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11BINFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
    • G11B20/00Signal processing not specific to the method of recording or reproducing; Circuits therefor
    • G11B20/10Digital recording or reproducing

Abstract

PURPOSE:To perform the conversion of a transmission speed of a digital data with good accuracy. CONSTITUTION:A signal 31 to be converted from a oscillator 30 oscillating the signal to be converted such as a digital audio disc or a tape is applied to a latch circuit 32 and a difference detector 34. In the latch circuit 32, a clock pulse 33 in frequency f1 is applied from the transmitter 30 and a delay data 35 shifted by one phase from the signal 31 is applied to the detector 34. A difference output 37 is multiplied with a coefficient 39 sequentially designated from a multiplication coefficient set counter 38 at a multiplier 36. The result of multiplication 34 is latched to a latch circuit 42 to be an interpolation data 47. The data 47 and the delayed data 35 are added at an addition circuit 46 to be a new converted signal 49. The signal 49 is applied to a latch circuit 48. The latch circuit 48 latches the converted signal 49 inputted by taking a clock pulse 52 in frequency f2 supplied from a receiver 50.
JP56094029A 1981-06-19 1981-06-19 Transmission speed converting system for digital data Pending JPS57210741A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56094029A JPS57210741A (en) 1981-06-19 1981-06-19 Transmission speed converting system for digital data

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56094029A JPS57210741A (en) 1981-06-19 1981-06-19 Transmission speed converting system for digital data

Publications (1)

Publication Number Publication Date
JPS57210741A true JPS57210741A (en) 1982-12-24

Family

ID=14099132

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56094029A Pending JPS57210741A (en) 1981-06-19 1981-06-19 Transmission speed converting system for digital data

Country Status (1)

Country Link
JP (1) JPS57210741A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0228646A2 (en) * 1985-12-20 1987-07-15 Hitachi, Ltd. A signal processing apparatus for disc memory devices

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0228646A2 (en) * 1985-12-20 1987-07-15 Hitachi, Ltd. A signal processing apparatus for disc memory devices

Similar Documents

Publication Publication Date Title
DE3373856D1 (en) Direct digital to digital sampling rate conversion method and apparatus
AU583691B2 (en) Phase-locked loop coefficient generator for a filter arrangement having a non-rational ratio between input and output sampling frequencies
ES487141A1 (en) Digital phase control circuit with auxiliary circuit.
AU3738485A (en) Interpolating filter arrangement with irrational ratio between the input and the output sampling frequencies
JPS5530778A (en) Digital input unit
JPS57210741A (en) Transmission speed converting system for digital data
JPS5757007A (en) Orthogonal delay detecting circuit
ES8107420A1 (en) Circuit arrangement for receiver-side clock recovery in digital synchronous information transmission.
JPS5630330A (en) Digital level detector
JPH01501111A (en) Method for receiving frequency modulated analog signals with digital processing and apparatus for carrying out the same
JPS56126900A (en) Digital filter
JPS5614727A (en) Phase comparator of digital pll circuit
GB1463806A (en) Radar systems including digital processing arrangements
JPS57138203A (en) Digital oscillator
JPS53131815A (en) Phase linear type emphasizer
JPS6488274A (en) Gps receiver
JPS5672372A (en) Sound depth meter
JPS5549029A (en) Automatic channel selector of am receiver
JPS57131153A (en) Delay detector
JPS5740716A (en) Fd demodulating circuit
JPS57185707A (en) Frequency conversion circuit
JPS57196647A (en) Clock signal reproducer
JPS5541074A (en) Timing pick up system
JPS5526720A (en) Noise pulse suppression system
JPS5545291A (en) Pulse multiplying circuit