JPH01501111A - Method for receiving frequency modulated analog signals with digital processing and apparatus for carrying out the same - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

[Detailed description of the invention] Method for receiving frequency modulated analog signals with digital processing and its implementation Equipment technology field for The present invention relates to radio reception technology, and in particular to frequency modulated analog radio reception technology. a method for receiving a digital signal while digitally processing the signal; and a method for performing the method. It relates to a device for.

Conventional technology Conventional methods for converting frequency modulated signals into audio signals (L, M, Xohonovich, “5tereofonicheskoe radiov es-chenie'', j1oscoey+5vyaz Publishers , p. 12.1974) that the modulation and amplification of the generated audio frequency signal is followed by converting the radio frequency signal into an intermediate frequency (IF) signal. I'm here.

In the case of stereo reception, additional operations are performed. : That is, after demodulation, the signal is left It is divided into respective components corresponding to the side channel and right channel.

Although this method is simple, it requires special information on frequency modulation and amplification of audio frequencies. Generates distortion in the audio signal based on its characteristics . What is known in this field is that Nachrichten technique Leitsch rift) Bd 36 (1983) Reft 12) Indicator Dimodulator Fuyquidiscnt Abget FM Signal J (Ein digitator Dea+odulator fiir aquidistant abge-totele FM-sig This is a method of receiving a frequency-modulated analog signal as shown in FIG. child According to the method, a frequency modulated analog signal is converted into an intermediate frequency signal .

f=f, ±Δf, ・−−−−−−−−−−−−−−−−−−−(1) where f, is the unmodulated IF times signal frequency; Δf is the IF times signal frequency deviation It is. This signal undergoes analog-to-digital conversion and is further converted during one IF period. At least three transformations (sampling) are performed. Then get it like this The digital signal obtained is processed according to the following equation.

Here, ω-2πf is the instantaneous frequency every sampling period T, T4 is the time between two adjacent samplings, ie the sampling period; A+, Az, Ax are three consecutive samples that are continuous with each other. This is the code value in

The signal then undergoes an inverse conversion (digital-to-analog), thereby making it suitable for listening. It can be supplied directly to the terminals of the loudspeaker.

If you are trying to generate a digital signal using prior art methods, the IF times It is required to convert the signal twice.

To further reduce nonlinear distortion and noise, the transformation from 4 to IIM) with high lz It is carried out at an intermediate frequency. Therefore, in order to obtain a highly accurate measurement of the deviation, A multi-disshift code is requested and the useful information is the lowest digit of the code. included only in

What is known in this field is that receiving frequency modulated analog signals is It is a device for carrying out the method of ”(“Nachrichtentechnische Leit” Bd 26 (1983) Reft 12) Nirator Fuyukui Deikunsu Abgetotere PM-Signale' (Ein digitaler Dea+o-dulator fijr aquidi stunt abgetotele PM-signal)] - it is directly Converter for the conversion of frequency-modulated analog signals connected in columns, analog - includes digital converters, processing units and digital-to-analog converters;

Frequency modulated analog signal output from a converter signal is fed to the input of an analog-to-digital converter, where it is converted into a digital signal. converted. Next, the digital signal is processed by a processor. It is processed according to equation (2) and then subjected to reverse digital-to-analog conversion processing.

The accuracy of the known intereclipse was low because the proportion of valid information in the modulated signal was low. I was only able to measure . In addition, high frequencies in the range 4 to 11 MHz The need to operate in waves makes the equipment expensive and complex.

Disclosure of invention The basic objective of the invention is to process frequency modulated analog signals with digital processing. A reception method comprising effective direct conversion of an IF signal frequency shift to a code and demodulation. The present invention provides a method for receiving received signals, and also provides a method for effectively implementing this method. It has a simple design and reasonable price, and has a high degree of accuracy and To provide an apparatus that can ensure the optimum means for carrying out such a method. It is something.

The purpose is to convert an analog signal into an intermediate frequency analog signal, and to The number is f=f, ±Δf1 - curved surface...Equivalent to curved surface (1), where fo is the frequency before IF multiplied signal modulation, Δf is the IF multiplied signal frequency deviation, while The IF analog signal is converted into a digital signal by digital processing. This is achieved by providing a method for receiving wave number modulated analog signals. Book According to the invention, the digital signal repeats the IF analog signal equal to the intermediate frequency. The pulse train is changed to a pulse train with a repetition frequency. The pulse train obtained in this way has a pulse period of periodically divided by a multiple of k to obtain a new pulse train equal to T = t - k. where t=1/f is the current value of the IF period; for each regular The division cycle is at the beginning of a regular period for sampling the IF analog signal. It starts at the moment of response, and each pulse in a new pulse train is a new pulse. to form a digital code that corresponds to the duration of each pulse in the pulse train. is used, which is a code proportional to frequency equal to f/ given by: converted to code.

N　F=m/N7　・River-・-・・・-song (3) Here, N is the frequency F=f/k N is a code proportional to the duration of each pulse in the new pulse train. and m is the scale factor; then, the frequency equal to f/ and I F times the IF signal deviation as the difference in the code corresponding to the unmodulated frequency. Frequency modulation analog with digital processing where a proportional code is formed This is accomplished by providing a method for receiving signals.

Receiving stereo frequency modulated analog signals in systems with polar modulated oscillations The period at which the IF analog signal is sampled for transmission is the period of the secondary transmission frequency. is chosen equal to half of the subcarrier frequency, and the sampling period is the extreme value of the subcarrier frequency. The time is determined by and the digital signal is formed by each sampling period. It will be done. Stereo frequency modulation analog in systems with pilot tone For signal reception, the sampling period of the IF analog signal is the period of the tone in question. and the sampling period is equal to one quarter of the double pilot tone frequency. The digital signal is tuned to the limit value and the digital signal is formed by each sampling period. It will be done.

A device for carrying out the signal reception method converts the frequency modulated analog signal into an intermediate frequency a converter for converting the frequency connected to the output of a converter that converts the modulated analog signal to an intermediate frequency signal; The other input is a comparator (coa+para-tor) connected to the common bus. A frequency divider whose input is connected to the output of the comparator, its data input is connected to the output of the frequency divider (7), whose input is connected to the output of the frequency divider. Processing bag g (processor) connected to the output of the length measurement unit , whose input is connected to the output of the processing device, and whose output is the output of this device. The signal divider and control inputs are connected to the output of the comparator and one output is the frequency The unidirectional output is connected to the control input of the number divider, pulse length measuring unit and processing device. The clock power is connected to the individual clock pulse inputs of the signal divider unit. This is achieved based on the fact that the pulse generator consists of It is. The claimed invention relates to converting analog signals to digital signals. In order to improve the accuracy of, simplify the design and reduce the cost of gW, In addition to reducing the distortion of the demodulated signal, it also reduces the IF signal deviation directly to the code. This makes it possible to perform various transformations.

Brief description of the drawing The invention will be further explained in the form of exemplary embodiments with reference to the accompanying drawings, in which: FIG.

FIG. 1 shows a frequency modulated analog signal receiving device with digital processing according to the present invention. A block diagram of the installation is shown below.

Figure 2 is adopted for converting the frequency modulated analog signal into an IF multiplied signal according to the present invention. A block diagram of the converted converter is shown.

FIG. 3 shows a block diagram of a pulse length measuring unit according to the invention.

FIG. 4 shows a block diagram of a clock pulse generator according to the invention.

FIG. 5 represents a time diagram illustrating the operation of the claimed apparatus according to the invention. are doing.

FIG. 6 is a time diagram illustrating the operation of a clock pulse generator according to the invention; It represents.

Preferred embodiments of the invention The claimed method for receiving frequency modulated analog signals is as follows: executed.

The input frequency modulated analog signal is converted to an intermediate frequency analog signal.

fyo f0±Δf Song - Song...Song (1) Here, fo is unchanged i [IF signal of is the frequency and Δf is the deviation of the IF signal.

After that, the IF analog signal f is a pulse train, for example a square wave with the same frequency. is converted to

Periodic frequency division (cyc lic frequency division) is executed.

Here, the division factor is determined from the following conditions: smx 9 Here, T is the sampling period for the analog signal of intermediate frequency f, Each next split cycle occurs at the instant corresponding to the start of the normal sampling period. will be started.

As a result, a new pulse with pulse duration T=t-k and repetition frequency equal to T4 A pulse train is obtained. After that, the pulse duration T=t-k is changed for each sample period. is measured, where t=I/f is the current value in the period of the intermediate frequency f, and A binary-digital code NT proportional to T is formed.

The code NA is converted to the code NF which is proportional to the frequency F=f/k, and the following equation shows the relationship: is related to N via.

Here, m is a constant scale factor, and the IF multiplied signal unmodulated frequency is 10. Proportional code consukun) Simultaneous subtraction of N, i.e. N r N = lΔN + −−−−−−−−−−−−−−・−・(5) It is accompanied by Here, the signal ΔN is determined by the deviation of f from fo.

In this way, the code proportional to the deviation Δf for a signal with an intermediate frequency f is It is formed. Stereo frequency modulation analyzer in systems with polar modulation oscillations For the reception of the log signal, a sample equal to half the period T, of the frequency of the subcarrier The programming period T4 is synchronized with the limit value of the frequency of the subcarrier, while obtained in the form of code ΔN. The information is sequentially provided through the right channel and the left channel.

For reception of signals in systems with pilot tones, pilot tone The sampling period T, equal to one quarter of the tone, is the double pilot tone frequency is synchronized to the limit value of

Assuming that ΔN is proportional to Δf, the following equation is obtained.

1゜ t.

Here, N T**X + NT. +NNTin is the maximum value of pulse period T, normal value and the code equivalents corresponding to the minimum value. , Δt is the period increment corresponding to f-Δf, and Δt2 is the period corresponding to f+Δf is the increment, and t is the period of the unmodulated frequency f. tl is the period of the reference frequency f.

In this case, Here, N F+++im * N Fo + N Famx is for the frequency f. Minimum f si,.

The code equivalent (code e quivalents).

m is a constant scale factor and is conveniently set to be mathematically equal to NT. It is determined based on the That is, 1° f, i, -fo-Δf is the minimum value of frequency f, f　erax=　f　O+Δ f is the maximum value of frequency f.

After subtracting the code frequency N proportional to the unmodulated frequency f, the maximum The expression for code ΔNI with increase is shown in the following equation.

The representation of the code ΔN, which has the maximum decrease with respect to f, is shown in the following equation.

In this way, the representation for ΔNI matches the representation for ΔNt. That is, ΔN+=ΔNz=ΔN −−−−−・・−・−・・−・(11) 1ΔN1=c ・Δf　・−・−・−・−・−・・・・−(12) From the last equation, the code ΔN is It is clear that it is proportional to Δf. Proportional dependence of code ΔN on Δf is the presence of nonlinear distortion in the output signal processed by the claimed method of the present invention. It shows that there is no. Considering the 8th equation, the final value for code 1ΔN1 is In this way, the display takes the form: An example digital signal is obtained.

Apparatus for carrying out this claimed method comprises frequency modulated analog signals. It includes a tacon hearter (Fig. 1), which is employed to convert the signal into an inter-frequency signal. The input of the converter is the input to the device, while the output of the converter is is connected to one input 2 of the comparator 3, the other input 4 of which is connected to the common bus. There is.

The output of the comparator 3 is connected to the data input of the pulse length measuring unit 6. connected to a frequency divider.

The device also has its input connected to the output of the pulse length measuring unit 6, while whose output is the input of the signal splitting unit 8 whose output is the output of the device in question. Processing equipment connected to power! (processor) 7 is included.

All these units 1.2, 3, 4, 5, 6, 7.8 include the measuring part of the device. is forming.

The tracking section of the device consists of a clock pulse generator 9, which The control input of is connected to the output of comparator 3, and its outputs 10 and 11 are signals are connected to the individual clock inputs of the dividing unit 8, while its output 12 is connected to the frequency connected to the control inputs of the wave number divider 5, the pulse length measuring unit 6 and the processing device 7. There is.

The converter 1 is connected in series with a frequency converter 13, for example as shown in FIG. The full-wave rectifier 14 may be included in the full-wave rectifier 14.

Frequency divider 13 multiplies the input signal and the local oscillator signal, with subsequent frequency selection. It may also be based on a circuit that acts as a matching multiplier. ( "Radio priemnye ustroyst" by V, V, Pa5hkov va'', moscow, Radio i 5vyaz Pub-1ishers , 1984. p, 139. See Figs 5.30 and 5.31) double the deviation The rectifier 14 used to It is stated in the figure.

Comparator 3 (Figure 1) is used in the book “Integranier” by B. K. Nesterenko. Inte-gralnye operatsi onnye usilitali (spravochnoe posobie II Energoiz dat) 1982+p, 120 good.

The frequency divider 5 can also be implemented on the "ring counter" principle, for example. Tozu (a shift counter with K=n, a book written by B.V. Tarapudding) Sporavoc hnik po integralnym mikro-skheman) Moss Co., Energia Pub-1ishers 1981. p, 717. Similar to that described in Fig. 5-216 may be made. In this case, however, the output signal is taken from output Q. The first trigger's data manually is output 107 instead of output Q7. and in addition, all triggers must be connected to the first trigger. must be sent by the input “R” including the settings, while the above In the diagram shown, the first trigger is set by the “S” input. .

One possible embodiment of the pulse length measuring unit 6 is shown in FIG. Yu The data power of the unit 6 is connected to the trigger power of the reference frequency pulse generator 20. Not only is the AND logic circuit 16, 17, 18, 19 combined human power 15 Directly connected. The output of the pulse generator 20 is directly connected to the input 21 of the AND circuit 16. directly connected to the input of the delay line 22 which is also connected in series. ing.

The output of each delay line 22 is connected to the input 23 of AND circuits 17, 18, 19. It is. The output of the AND circuit 16 is the complementary input of the counter 24. +enting 1nput), one-sided AND circuit 17, For the outputs of 18 and 19, the forward output is a Johnson code. input of a converter 26 used to convert de) into a binary code; They are individually connected to the S input of the connected R5-trigger 25. all R3 - the R input for setting the trigger 25 is coupled and connected to the control input of the unit 6; It is continued. The output of the converter 26 and the output of the counter 24 are connected to a pulse length measurement unit. This is the data output of cut 6.

The processing device 7 may be formed in the form of a pre-programmed storage device. . (constant 5ensory device) (A, G Aleks eenko and 1.1. “Mikroskhemo” by Shagurin tekhnika”.

Moscow, Radio i 5vyaz Publishers, 1982 ．． (See page 27) As a specific example of hardware, processing bag R7, for example, m ・ROM device (F, Meizda, “Integr alnyeskhemy, technologiya i primenen3 e”, Moscow, Mir Publishers.

1981, P160. (see Fig. 5.34) and a matching type that acts as a subtractor. Multi-function based adder (coincidence-type adder) Pryor (V, Goldsward, “Proektirovanie ts yfrouykh logichesk-4kh ustroistve″Mo scow, Mashinoslroenie Publishers, 1985 p, 66, Fig. 4.7). Based on ROM device The multiplier used is an opera-tional automatic device for division. may be replaced by automation for division).

(S, A, Mayorov and G, 1. Novikov+“Pr1nts ipy organizatsiitsifrovykh mashin", L eningrad, Mashinostroenie Publishers.

1974, p. 305. (See Fig. 8.10) The signal splitting unit 8 (Fig. 1) is It consists of two separate registers for the right and left channels. each The data input of the register is connected to the output of processing bag W7, and one The inputs are connected to the corresponding outputs of the clock pulse generator 9. Regis The author of the book ``Suprahokunifukubo Integra'' written by Bee, Vui, and Tarabarin. 5 pravochnik po integral nys m1kro-skhe mafi″by B, V, Tarabin) (Moscow, Energia Publishers, 1981.p, 725.Fig5-22 8).

The clock pulse generator 9 may be configured as shown in FIG. The following components are connected in series. That is, the input is the generator 90 The input frequency detector 27, filter 28, and forward output are driven Multivibrake-30 (driven mutlivibrator) and short pa Connected to pulse shaper (short pulse 5haper) 31 and a comparator 29. The reverse output of the comparator 29 is a driven multi-vibrator. 32 and a short pulse shaper 33. driven multi-vibration The outputs of circuits 32 and 30 are outputs 10 and 11 of generator 9, respectively, while shaping The outputs of generators 31 and 33 are input to an AND circuit 340 whose output is output 12 of generator 9. connected to power.

The frequency detector 27 can be used, for example, in the book "Radio Prix" by V. V. Parshikov. Munieustroistafa J (V, V.

Pa1shkov "Radiopriemnye ustroistva')Mo Squaw, Radio i 5vyaz Public + (Radio i 5vyaz Pu blishers) 1984゜p, 214. Pulse cow according to Fig. 7.28 It may also be something that was created as a center.

The filter 28 may be used, for example, in the ``Stereo Decode'' series written by P.M. J (P, M, Zhmirin, "5tereodekodery".

Moscow? -(Svyaz Publ 1shers) +1980+p, 22. As shown in Figs. 4 and 7, It may be made to match.

Comparator 29 may be the same as comparator 2 (FIG. 1). Short pulse shaper 3 1.33 (Figure 4) is created in the form of a differential circuit based on logic elements. It may be. Such circuits are described in the book “Integrators” by T. M. Magakuhayan. Klarniemikuroschemii J (T, M, Agakhayan, “Integ Moscow, Energoizdakhtova Bryshers (Energoizdat Publ 1shers) + 19 83+ p, 442+ Figslo, 10a and its use is explained in A. It consists of an ND gate (without inversion). Multi-bye break driven -30, 32 are the zeros written by E and Ekolumbet, Kolmbet.

Taimery’) Moscow, Radioe, Sukhyappa Rifshas (Rad) io i 5vyaz Publishers), 1983. No, 39. p, 32. Made in the formation of the device described in Fig. 2.8, Good too.

Figure 5 represents a time diagram illustrating the operation of the claimed device. There is.

Each chart shows the following:

(a) consists of a square wave pulse train whose repetition frequency is equal to the intermediate frequency f. This is the output signal of comparator 3 (FIG. 1).

(b) consists of a rectangular pulse train with a duration T. This is the output signal of the frequency divider 5 (FIG. 1).

(c) is time τ. , τ1. τ2...Output 12 of the generator 9 at τa (Fig. 1 ) and are separated from each other by an interval T4. This is an output signal composed of

(d), (e) are the times at outputs 10 and 11 (Fig. 1) of generator 9. Between rl, r! The generated signals at +11+12 are shown, respectively. ! i? Time The signals between r1 and r2 are output to the right channel register of the signal splitting unit 8 (Fig. 1). It corresponds to the time to record data, while the time I In l z (Fig. 5 ( e)) corresponds to the time to record the output data in the left channel register. .

D is a regular conversion cycle is the time interval required for e).

Figure 6 is a time diagram illustrating the operation of clock pulse generator 9 (Figure 1). Grams are shown.

Curve 6a is from the output of comparator 3 to the input of generator 9 (Fig. 1) shows a signal fed to a signal whose repetition frequency is equal to the intermediate frequency f. This is a new square wave pulse train.

Curve 6b is formed at the output of filter 28 (Fig. 4) The waveform shown in FIG.

Curves 6C and 6d are formed at the forward and reverse outputs of comparator 29 (FIG. 4). and each signal is shifted relative to each other by T4. It consists of a waveform pulse train.

Curves 6e, 6f, and 6g are curves 5c, 5d, and 5e (Fig. 5(c), (d ) and (e)) respectively. Ru.

Receiving frequency modulated analog signals with digital processing in steady state The operation of the claimed apparatus for carrying out the method is described below. 1st Considering the conversion of the stereo signal as the most likely technique then monophonic This event was held to talk about monophonic devices. Explain all simplifications that can be made.

For better understanding, the operation of the measuring part of the device is separate from the operation of the trafking part. will be considered.

The frequency modulated analog signal applied to the input of converter 1 (Figure 1) has an intermediate frequency The signal f=f is converted into ±Δf and passed through the full-wave rectifier 14 (Fig. 2) to the comparator 3. (FIG. 1). This signal is then duplicated at the comparator 30 input. It is possible to obtain a signal with a deviation, that is, Δf'-2·Δf1.

At the output of comparator 3, its frequency parameter is A rectangular pulse train (FIG. 5(a)) appropriate to the parameters of the force signal is formed; On the other hand, the amplification parameters of these pulses are determined in units 5.6 and 7.8.9. It corresponds to the voltage level required for the operation of the logic element.

The output signal of the comparator 3 is divided by a division factor K (K=constant) by the frequency divider 5. Processed using Here, the value of K is determined by the following conditions.

K　　L　maw　<　T4　・−・−−〜−−−−−−−−−−・　(14 ) where t□ is the maximum duration of the pulse at the output of comparator 3.

During the next division cycle and subsequent pulse length measurement, the frequency divider 5 and the pulse length measurement unit 6 for a time τ. The output 12 of the generator 9 (Fig. 5(C)) Preparation for actuation is made by a pulse formed in Fig. 1). This pulse has a repeating period is 1/T4.

By being driven by this pulse, the frequency divider 5 (Fig. 1) start a split cycle. (During the sampling period T, there are When a pulse is applied, a pulse with duration T is formed at the output of the frequency divider. .

The duration of this pulse T is the standard within the time interval T. It is measured in unit 6 by counting the number of pulses of frequency f.

This code NT is applied to the input of the processing device 7, where it is applied to each regular cycle. (every sampling period T4) performs a conversion operation in the form of the following equation.

t Here, m is a scale factor and is constant.

N is constant and is a code proportional to the value of the unmodulated frequency f0 of the signal with intermediate frequency f. It is de.

N, is a code proportional to the measured pulse length.

N is a code proportional to the deviation Δf of the signal with intermediate frequency f.

A processing device 7 acts as a multiplier and a subtractor and Coincidence adder connected in series with If it is made in the shape of , code N.

The output code is proportional to the instantaneous value of the intermediate frequency f supplied and every sampling period T4. generate N. Then code N is subtracted from this code N1 by means of an adder be done.

Code N has a level that corresponds to the value of code N at the input of the adder. d, which corresponds to the logic “0” and “1” levels of the elements connected to the voltage source. Can be formed with help. In this way, the processing device At the output of 7, a code ΔN proportional to Δf is formed, which is In the data input of the signal splitting unit 8, which includes two registers consisting of channels. applied.

The value of the code ΔN is the parameter formed at the outputs 10 and 11 of the generator 9 (FIG. 1). Alternately in these registers with a frequency equal to 1 / T a recorded. This code is the output information of this device.

In the next cycle, the above process is repeated at time τ1 (FIG. 5(C)). It is repeated starting from the appearance of the message.

5(d), (e) during the time interval during which one conversion cycle is performed. )) is selected based on the following conditions.

K-t□, <D-T4　・・・−・−・・−・−−−−1−・・−・　(16) books The operation of the tracking part of the device, namely the clock pulse generator 9 (Fig. 4), is as follows. It is executed like a sea urchin.

Is it a square wave pulse train in which one repetition frequency is equal to the intermediate frequency f (Fig. 6(a))? is applied from the output of comparator 5 (FIG. 1) to the input of generator 9. this After the signal has been processed in frequency detector 27 (FIG. 4) and filter 28, This is converted into polar modulation oscillation (FIG. 6(b)).

This signal is fed to the input of comparator 29 (FIG. 4) and its forward and reverse outputs The signals at are shown in FIGS. 6(c) and (d).

The signal formed at the forward output of comparator 29 (FIG. 4) is driven during that period. reduced to the required value by means of multi-by-break-30 (Figure 4). 6(e)) and the form shown in FIG. 6(e). Take. A driving multi-vib formed at the inverting output of comparator 30 (FIG. 4) The signal processed by the receiver 32 is shown in FIG. 6(f). Both of these The signal results in (int ime) are distributed, and they are distributed by the signal dividing unit 8 (Fig. 1). This is a pulse that records output data in the corresponding register.

The signals formed at the forward and inverted outputs of comparator 29 (FIG. 4) are applied to the inputs of the respective short pulse shapers 31 and 33, which in turn The signal from the output of the shaper, etc., passes through the OR circuit 34 to the output 12 of the generator 9. , each of these signals starts a regular cycle of operation of the claimed device. let

The duration T of the pulses formed at the outputs 10, 11 and 12 of the generator 9 is: It must be of a degree that satisfies the formula.

D+T, ≦t, −−−−−−−−−−−−−−− (17) In this case, the maximum of the pulse The small value is also used as a frequency divider to record the information in the signal division unit 8 (Fig. 1). 5. Determined by the period required to reset the unit 6 and processing bag W7. determined.

Thus, from the explanation regarding the operation, the following can be said: The measurement part in the cycle (sampling period T4) is the unmodulated frequency f, Determine the code ΔN proportional to the instantaneous value of frequency deviation (every sampling period MT6) while the tracking part keeps each regular cycle of measurement close to its limit value. within an interval of half a period of the frequency of the subcarrier located at.

For stereo systems that have a pilot tone instead of a subcarrier frequency signal. In this case, the pilot tone signal is a reference oscillator. ation) from which a clock signal is formed.

When the above system is used for receiving a mono signal, the device mode. The time distribution of all clock pulses is shown in Figures 5 and 6. remains the same.

In the claimed apparatus, a digital signal is formed directly from an intermediate frequency signal. .

Excluding one transform - one frequency modulation - improves the accuracy of the measurement of the deviation Δf, Furthermore, it promotes simplification of equipment and reduction of costs.

Below we provide an example for the case of a system with polar modulated oscillations. . In this example, the true value of frequency f: is expressed as Evaluated for standard parameters (for this system) and values 1ΔN+=2” Ta.

N = 512 = code equivalent (code eq uivalent).

n-10 is the word length of the digital binary code.

Δf = 50 x 10') Iz is the frequency shift.

f o = 465 x 10') Iz is the unmodulated frequency.

Ta = 15.625 x 10-b is the sampling period.

P=8 is the number of delay elements.

tx is the delay time of one delay element.

From equation (4), we get the following Assuming that =5, and using equation (13), we obtain the following equation. Or considering the deviation hand = 200 x 10’Hz This value is suitable for implementing devices based on emitter-coupled transistor logic circuit elements. completely acceptable.

The true value of the reference frequency f; This value is a transistor-transistor with a Shonto key barrier diode. is perfectly acceptable for implementing devices with external logic circuits; The use of an emifter coupled logic circuit additionally shifts the output by at least one digit. Improving the measurement accuracy of Δf and increasing the number of deshifts up to n=11 is possible.

Industrial applicability The claimed invention is based on frequency modulation in video recording systems. Not only for demodulating modulated signals, but also for chrominance in SECAM systems. configuring a receiver for demodulating a nonce subcarrier or for receiving a frequency modulated signal. May be used when

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Claims (4)

[Claims] 1. Frequency modulated analog signal f=fo±Δf, ■Equal to (1) intermediate frequency (f) converted to an analog signal, where fo is the IF signal. is the frequency before modulation of the signal, Δf is the frequency deviation of the intermediate frequency signal, while An analog signal with an intermediate frequency (f) is converted into a digital signal by digital processing. In a method for receiving frequency-modulated analog signals with In order to obtain It is converted into a pulse train with a wave number (f), and the frequency of the obtained pulse train is periodically A new partition is divided by a multiple of K so that its period (T) is equal to T=t・K. Here, t=I/f is the voltage with period of intermediate frequency (f). current value; each regular division cycle is a sample of the intermediate frequency (f) analog signal. It starts at the moment in response to the start of the regular period (Td) for sampling. and each pulse of the new pulse train is It is used to form a digital code (NT) corresponding to a period (T), and its This is a code proportional to frequency (f/k) equal to f/K given by: (NF). NF=m/NT■(3) m is the scale factor; then the frequency (F) and intermediate frequency equal to f/K The difference between the wave number (f) and the unmodulated frequency (f.) of the signal and the corresponding code (NF and N) to form a code (ΔN) proportional to the intermediate frequency signal deviation (Δf) as A method for receiving frequency modulated analog signals with characteristic digital processing. 2. Stereo frequency modulated analog signals in systems with polar modulated oscillations The period (Td) for sampling the intermediate frequency (f) analog signal to receive ) is chosen to be equal to half the period of the subcarrier frequency (Tp), and the sampling The programming period (Td) is synchronized to the frequency limit of the subcarrier and the digital signal is Claim 1 characterized in that it is formed by a sampling period (Td). Method described. 3. Stereo frequency modulated analog signals in systems with pilot tones For reception of the signal, the intermediate frequency (f) and the sampling period (Td) of the analog signal. is selected to be equal to one quarter of the period (Tp) of the pilot tone in question. The sampling period (Td) must be synchronized with the extreme value of the dual pilot tone frequency. It is also assumed that the digital signal is formed by each sampling period (Td). A method according to claim 1, characterized in that: 4. a converter (1) that converts a frequency modulated analog signal into an intermediate frequency (f) signal; 2. A device further comprising: one input (2) receiving an intermediate frequency modulated signal; It is connected to the output of the converter (1) which converts it into a frequency signal (f), and the other input The input (4) is connected to the common bus to the comparator (3); its input is connected to the comparator (3). A frequency divider (5) connected to the output, whose data input is connected to the frequency divider (5) A pulse length measurement unit (6) connected to the output of 5), whose input is connected to the output of A processing device (7) connected to the output of the measurement unit (6), whose input is connected to the processing device The output of the unit (8) is connected to the output of the unit (7), and the output of the unit (8) becomes the output of the device. a signal divider (8), and its control input is connected to the output of the comparator (3). Its one output also includes a frequency divider (5), a pulse length measurement unit (6) and connected to the control input of the processing unit (7), while the other outputs (10, 11) are signal splitters. clock pulses connected to the individual clock pulse inputs of the device unit (8) Claims 1 to 3, characterized in that the generator (9) is comprised of a generator (9). Apparatus for carrying out the method described in Section.