JPS57210622A - Sos substrate and manufacture thereof - Google Patents

Sos substrate and manufacture thereof

Info

Publication number
JPS57210622A
JPS57210622A JP9512381A JP9512381A JPS57210622A JP S57210622 A JPS57210622 A JP S57210622A JP 9512381 A JP9512381 A JP 9512381A JP 9512381 A JP9512381 A JP 9512381A JP S57210622 A JPS57210622 A JP S57210622A
Authority
JP
Japan
Prior art keywords
island
manufacture
sapphire substrate
necessary
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9512381A
Other languages
Japanese (ja)
Inventor
Shingo Hashimoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Citizen Holdings Co Ltd
Citizen Watch Co Ltd
Original Assignee
Citizen Holdings Co Ltd
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Holdings Co Ltd, Citizen Watch Co Ltd filed Critical Citizen Holdings Co Ltd
Priority to JP9512381A priority Critical patent/JPS57210622A/en
Publication of JPS57210622A publication Critical patent/JPS57210622A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/0242—Crystalline insulating materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02656—Special treatments
    • H01L21/02664—Aftertreatments
    • H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H01L21/02675—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Optics & Photonics (AREA)
  • Materials Engineering (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

PURPOSE:To lower a processing temperature, shorten a processing time and reduce manufacturing cost, by single-crystallizing only a necessary island-shaped region on a sapphire substrate. CONSTITUTION:An amorphous silicone or polycrystalline silicon film 20 is deposited on a sapphire substrate 1. The film 20 is removed leaving only a necessary region 21. Only island-shaped region 21 is annealed and single-crystallized on such conditions that only film thickness is effectively heated by laser annealing or pulsating heating.
JP9512381A 1981-06-19 1981-06-19 Sos substrate and manufacture thereof Pending JPS57210622A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9512381A JPS57210622A (en) 1981-06-19 1981-06-19 Sos substrate and manufacture thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9512381A JPS57210622A (en) 1981-06-19 1981-06-19 Sos substrate and manufacture thereof

Publications (1)

Publication Number Publication Date
JPS57210622A true JPS57210622A (en) 1982-12-24

Family

ID=14129047

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9512381A Pending JPS57210622A (en) 1981-06-19 1981-06-19 Sos substrate and manufacture thereof

Country Status (1)

Country Link
JP (1) JPS57210622A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0328405A2 (en) * 1988-02-11 1989-08-16 Gte Laboratories Incorporated Semiconductor structure and method of manufacture
US5061655A (en) * 1990-02-16 1991-10-29 Mitsubishi Denki Kabushiki Kaisha Method of producing SOI structures
US5272105A (en) * 1988-02-11 1993-12-21 Gte Laboratories Incorporated Method of manufacturing an heteroepitaxial semiconductor structure

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0328405A2 (en) * 1988-02-11 1989-08-16 Gte Laboratories Incorporated Semiconductor structure and method of manufacture
EP0328405A3 (en) * 1988-02-11 1990-08-16 Gte Laboratories Incorporated Semiconductor structure and method of manufacture
US5272105A (en) * 1988-02-11 1993-12-21 Gte Laboratories Incorporated Method of manufacturing an heteroepitaxial semiconductor structure
US5061655A (en) * 1990-02-16 1991-10-29 Mitsubishi Denki Kabushiki Kaisha Method of producing SOI structures

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