JPS5720984A - Multiprocessor system - Google Patents
Multiprocessor systemInfo
- Publication number
- JPS5720984A JPS5720984A JP9604280A JP9604280A JPS5720984A JP S5720984 A JPS5720984 A JP S5720984A JP 9604280 A JP9604280 A JP 9604280A JP 9604280 A JP9604280 A JP 9604280A JP S5720984 A JPS5720984 A JP S5720984A
- Authority
- JP
- Japan
- Prior art keywords
- memory
- main memory
- information
- buffer memories
- indicator
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
- G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Memory System Of A Hierarchy Structure (AREA)
- Semiconductor Integrated Circuits (AREA)
Abstract
PURPOSE:To update buffer memories efficiently by providing each information processor, having the buffer memory, with a main memory indicator which indicates the state of relation with a main memory. CONSTITUTION:Information processors 2 and 2' sharing a main memory 1 and having buffer memories 3 and 3' respectively are provided with main memory indicators 10 and 10' which indicate the shared state of the memory 1 by the devices 2 by region blocks. Therefore, when the memory 3 of the device 2, etc., is to be updated, the shared state of information of the block of the memory 1 to be stored as to the device 2' is found immediately by referring to the indicator 10, thereby eliminating the need to transfer registration information to the device 2' and to process a response, etc., from the device 2' to the device 2. Consequently, the buffer memories are updated efficiently.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9604280A JPS5720984A (en) | 1980-07-14 | 1980-07-14 | Multiprocessor system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP9604280A JPS5720984A (en) | 1980-07-14 | 1980-07-14 | Multiprocessor system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5720984A true JPS5720984A (en) | 1982-02-03 |
Family
ID=14154426
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP9604280A Pending JPS5720984A (en) | 1980-07-14 | 1980-07-14 | Multiprocessor system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5720984A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61243014A (en) * | 1985-04-20 | 1986-10-29 | Lion Corp | Foaming bath agent |
JPS62117977U (en) * | 1986-01-18 | 1987-07-27 | ||
JPH01314356A (en) * | 1988-06-14 | 1989-12-19 | Fujitsu Ltd | Key information processing system for multiprocessing system |
-
1980
- 1980-07-14 JP JP9604280A patent/JPS5720984A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61243014A (en) * | 1985-04-20 | 1986-10-29 | Lion Corp | Foaming bath agent |
JPS62117977U (en) * | 1986-01-18 | 1987-07-27 | ||
JPH0350875Y2 (en) * | 1986-01-18 | 1991-10-30 | ||
JPH01314356A (en) * | 1988-06-14 | 1989-12-19 | Fujitsu Ltd | Key information processing system for multiprocessing system |
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