JPS57206973A - History record controlling system - Google Patents
History record controlling systemInfo
- Publication number
- JPS57206973A JPS57206973A JP56091701A JP9170181A JPS57206973A JP S57206973 A JPS57206973 A JP S57206973A JP 56091701 A JP56091701 A JP 56091701A JP 9170181 A JP9170181 A JP 9170181A JP S57206973 A JPS57206973 A JP S57206973A
- Authority
- JP
- Japan
- Prior art keywords
- hung
- history
- content
- memory
- writing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/0703—Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Quality & Reliability (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Debugging And Monitoring (AREA)
Abstract
PURPOSE:To avoid missing the information showing the stage under which a device is hung although the device is actually hung, by controlling the writing to a history memory in accordance with the result of comparison between the content of a latch group and the content of history data. CONSTITUTION:When a device is hung, the same plural statuses and commands are successively latched to a latch group 11. Then the content of the group 11 is identical with the content of a history buffer 13. As a result, the dissident signal delivered from a comparator 19 is set at logic ''0'' to inhibit the writing of the history data to a history memory 16. At the same time, the renewal of a history pointer 17 is also inhibited. Thus the information showing the stage under which the device is hung is preserved in the memory 16 in case the device is actually hung.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56091701A JPS57206973A (en) | 1981-06-15 | 1981-06-15 | History record controlling system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56091701A JPS57206973A (en) | 1981-06-15 | 1981-06-15 | History record controlling system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57206973A true JPS57206973A (en) | 1982-12-18 |
Family
ID=14033817
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56091701A Pending JPS57206973A (en) | 1981-06-15 | 1981-06-15 | History record controlling system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57206973A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60254241A (en) * | 1984-05-31 | 1985-12-14 | Fujitsu Ltd | Error detection control circuit |
JPH01195548A (en) * | 1988-01-30 | 1989-08-07 | Fanuc Ltd | Recording system for program executing state |
JPH01199244A (en) * | 1987-11-25 | 1989-08-10 | Tokyo Keisan Service Kk | Recording system for history of input/output signal |
-
1981
- 1981-06-15 JP JP56091701A patent/JPS57206973A/en active Pending
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS60254241A (en) * | 1984-05-31 | 1985-12-14 | Fujitsu Ltd | Error detection control circuit |
JPH01199244A (en) * | 1987-11-25 | 1989-08-10 | Tokyo Keisan Service Kk | Recording system for history of input/output signal |
JPH01195548A (en) * | 1988-01-30 | 1989-08-07 | Fanuc Ltd | Recording system for program executing state |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS57206973A (en) | History record controlling system | |
JPS55115121A (en) | Input and output control unit possible for duplicated recording | |
EP0297891A3 (en) | Apparatus and method for main memory unit protection using access and fault logic signals | |
JPS54148346A (en) | Memory access system for multi-processor system | |
JPS5534314A (en) | Key memory system | |
JPS57137938A (en) | Data processor | |
JPS56124961A (en) | Information processing equipment | |
JPS5733472A (en) | Memory access control system | |
JPS54107235A (en) | Interrupt control system | |
JPS5730172A (en) | Buffer memory control system | |
JPS643879A (en) | Magnetic tape controller | |
JPS57157333A (en) | Memory address control system | |
JPS5584090A (en) | Stack control system for logic control unit | |
JPS6482240A (en) | Information processing system | |
JPS55901A (en) | Data buffer control system | |
JPS55162161A (en) | Buffer register control system | |
JPS54148453A (en) | Equal-type duplicate data control system | |
JPS5487028A (en) | Data process system | |
JPS57209525A (en) | Access controlling system for channel buffer | |
JPS5651075A (en) | Buffer control system of address conversion | |
JPS5640957A (en) | Magnetic tape control system | |
JPS56147249A (en) | Self-diagnostic processing system for unit made into firmware | |
JPS5299724A (en) | Memory diagnosing method | |
JPS5372428A (en) | Data renewal system | |
JPS6451536A (en) | Output protector |