JPS57203150A - History recording system of logical device - Google Patents

History recording system of logical device

Info

Publication number
JPS57203150A
JPS57203150A JP56089170A JP8917081A JPS57203150A JP S57203150 A JPS57203150 A JP S57203150A JP 56089170 A JP56089170 A JP 56089170A JP 8917081 A JP8917081 A JP 8917081A JP S57203150 A JPS57203150 A JP S57203150A
Authority
JP
Japan
Prior art keywords
storage area
logical device
error
information
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56089170A
Other languages
English (en)
Inventor
Hideo Tamura
Kazuhiro Hara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56089170A priority Critical patent/JPS57203150A/ja
Publication of JPS57203150A publication Critical patent/JPS57203150A/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
JP56089170A 1981-06-10 1981-06-10 History recording system of logical device Pending JPS57203150A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56089170A JPS57203150A (en) 1981-06-10 1981-06-10 History recording system of logical device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56089170A JPS57203150A (en) 1981-06-10 1981-06-10 History recording system of logical device

Publications (1)

Publication Number Publication Date
JPS57203150A true JPS57203150A (en) 1982-12-13

Family

ID=13963314

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56089170A Pending JPS57203150A (en) 1981-06-10 1981-06-10 History recording system of logical device

Country Status (1)

Country Link
JP (1) JPS57203150A (ja)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60209849A (ja) * 1984-04-03 1985-10-22 Konishiroku Photo Ind Co Ltd 画像形成装置
JPS60209847A (ja) * 1984-04-03 1985-10-22 Konishiroku Photo Ind Co Ltd 画像形成装置
JPS6319047A (ja) * 1986-07-11 1988-01-26 Hitachi Ltd プログラムトレ−ス方法
JP2009109020A (ja) * 2000-11-08 2009-05-21 Jtekt Corp 電磁クラッチを用いた駆動力伝達装置の組立方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60209849A (ja) * 1984-04-03 1985-10-22 Konishiroku Photo Ind Co Ltd 画像形成装置
JPS60209847A (ja) * 1984-04-03 1985-10-22 Konishiroku Photo Ind Co Ltd 画像形成装置
JPS6319047A (ja) * 1986-07-11 1988-01-26 Hitachi Ltd プログラムトレ−ス方法
JP2009109020A (ja) * 2000-11-08 2009-05-21 Jtekt Corp 電磁クラッチを用いた駆動力伝達装置の組立方法

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