JPS57197930A - Logical circuit - Google Patents

Logical circuit

Info

Publication number
JPS57197930A
JPS57197930A JP57068593A JP6859382A JPS57197930A JP S57197930 A JPS57197930 A JP S57197930A JP 57068593 A JP57068593 A JP 57068593A JP 6859382 A JP6859382 A JP 6859382A JP S57197930 A JPS57197930 A JP S57197930A
Authority
JP
Japan
Prior art keywords
igfets
precharging
igfet204
fet
logical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57068593A
Other languages
English (en)
Inventor
Masataka Hirasawa
Kenji Kawatani
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP57068593A priority Critical patent/JPS57197930A/ja
Publication of JPS57197930A publication Critical patent/JPS57197930A/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/096—Synchronous circuits, i.e. using clock signals

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
JP57068593A 1982-04-26 1982-04-26 Logical circuit Pending JPS57197930A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57068593A JPS57197930A (en) 1982-04-26 1982-04-26 Logical circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57068593A JPS57197930A (en) 1982-04-26 1982-04-26 Logical circuit

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP8635572A Division JPS4943559A (ja) 1972-08-31 1972-08-31

Publications (1)

Publication Number Publication Date
JPS57197930A true JPS57197930A (en) 1982-12-04

Family

ID=13378239

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57068593A Pending JPS57197930A (en) 1982-04-26 1982-04-26 Logical circuit

Country Status (1)

Country Link
JP (1) JPS57197930A (ja)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4659948A (en) * 1983-07-15 1987-04-21 Northern Telecom Limited Programmable logic array
JP2012151662A (ja) * 2011-01-19 2012-08-09 Tokyo Metropolitan Univ リング発振器

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4659948A (en) * 1983-07-15 1987-04-21 Northern Telecom Limited Programmable logic array
JP2012151662A (ja) * 2011-01-19 2012-08-09 Tokyo Metropolitan Univ リング発振器

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