JPS57197846A - Airtight sealing method for lead wire - Google Patents

Airtight sealing method for lead wire

Info

Publication number
JPS57197846A
JPS57197846A JP57086637A JP8663782A JPS57197846A JP S57197846 A JPS57197846 A JP S57197846A JP 57086637 A JP57086637 A JP 57086637A JP 8663782 A JP8663782 A JP 8663782A JP S57197846 A JPS57197846 A JP S57197846A
Authority
JP
Japan
Prior art keywords
lead
glass
lead frame
lead wire
pellet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57086637A
Other languages
Japanese (ja)
Other versions
JPS5856979B2 (en
Inventor
Shunei Uematsu
Michio Tanimoto
Shunichi Fujiwara
Shunichiro Fujioka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP57086637A priority Critical patent/JPS5856979B2/en
Publication of JPS57197846A publication Critical patent/JPS57197846A/en
Publication of JPS5856979B2 publication Critical patent/JPS5856979B2/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16152Cap comprising a cavity for hosting the device, e.g. U-shaped cap

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To seal a flat lead frame in airtight form by executing a process in which an insulator is softened. CONSTITUTION:The lead frame 3 is placed under a condition that a glass layer 2 on a base 1 is melted. An element 4 is attached, and wire bonding is conducted. A cap 7 is placed onto a pellet 4, wires 6 and a lead 5, glass layers 2, 8 are softened again in a nitrogen atmosphere, and the pellet, the wires and the lead are sealed temporarily. The outer frame section 9 of the lead frame is cut, and bent at a predetermined position. The whole is heated up to the softening temperature (440 deg.C) of glass in the nitrogen atmosphere again, and cracks in the glass layers generated in a previous process are removed.
JP57086637A 1982-05-24 1982-05-24 Hermetic sealing method for lead wires Expired JPS5856979B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57086637A JPS5856979B2 (en) 1982-05-24 1982-05-24 Hermetic sealing method for lead wires

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57086637A JPS5856979B2 (en) 1982-05-24 1982-05-24 Hermetic sealing method for lead wires

Publications (2)

Publication Number Publication Date
JPS57197846A true JPS57197846A (en) 1982-12-04
JPS5856979B2 JPS5856979B2 (en) 1983-12-17

Family

ID=13892530

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57086637A Expired JPS5856979B2 (en) 1982-05-24 1982-05-24 Hermetic sealing method for lead wires

Country Status (1)

Country Link
JP (1) JPS5856979B2 (en)

Also Published As

Publication number Publication date
JPS5856979B2 (en) 1983-12-17

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