JPS57197846A - Airtight sealing method for lead wire - Google Patents
Airtight sealing method for lead wireInfo
- Publication number
- JPS57197846A JPS57197846A JP57086637A JP8663782A JPS57197846A JP S57197846 A JPS57197846 A JP S57197846A JP 57086637 A JP57086637 A JP 57086637A JP 8663782 A JP8663782 A JP 8663782A JP S57197846 A JPS57197846 A JP S57197846A
- Authority
- JP
- Japan
- Prior art keywords
- lead
- glass
- lead frame
- lead wire
- pellet
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000000034 method Methods 0.000 title abstract 3
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 title 1
- 238000007789 sealing Methods 0.000 title 1
- 239000011521 glass Substances 0.000 abstract 4
- 239000012299 nitrogen atmosphere Substances 0.000 abstract 2
- 239000008188 pellet Substances 0.000 abstract 2
- 239000012212 insulator Substances 0.000 abstract 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
PURPOSE:To seal a flat lead frame in airtight form by executing a process in which an insulator is softened. CONSTITUTION:The lead frame 3 is placed under a condition that a glass layer 2 on a base 1 is melted. An element 4 is attached, and wire bonding is conducted. A cap 7 is placed onto a pellet 4, wires 6 and a lead 5, glass layers 2, 8 are softened again in a nitrogen atmosphere, and the pellet, the wires and the lead are sealed temporarily. The outer frame section 9 of the lead frame is cut, and bent at a predetermined position. The whole is heated up to the softening temperature (440 deg.C) of glass in the nitrogen atmosphere again, and cracks in the glass layers generated in a previous process are removed.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57086637A JPS5856979B2 (en) | 1982-05-24 | 1982-05-24 | Hermetic sealing method for lead wires |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP57086637A JPS5856979B2 (en) | 1982-05-24 | 1982-05-24 | Hermetic sealing method for lead wires |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57197846A true JPS57197846A (en) | 1982-12-04 |
JPS5856979B2 JPS5856979B2 (en) | 1983-12-17 |
Family
ID=13892530
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP57086637A Expired JPS5856979B2 (en) | 1982-05-24 | 1982-05-24 | Hermetic sealing method for lead wires |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5856979B2 (en) |
-
1982
- 1982-05-24 JP JP57086637A patent/JPS5856979B2/en not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS5856979B2 (en) | 1983-12-17 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS57197846A (en) | Airtight sealing method for lead wire | |
US4504427A (en) | Solder preform stabilization for lead frames | |
EP0193382A3 (en) | Optical fiber cables having improved hermeticity | |
JPS54129880A (en) | Manufacture for semiconductor device | |
US4347074A (en) | Sealing technique for semiconductor devices | |
JPH027453A (en) | Glass cap method | |
JPS6386484A (en) | Manufacture of optical semiconductor device | |
JPS60132347A (en) | Manufacture of semiconductor device | |
JPS63144528A (en) | Device for manufacture of semiconductor device | |
JPS567453A (en) | Manufacture of semiconductor device | |
JPS6024581B2 (en) | Hermetic sealing method for lead wires | |
JPS5662342A (en) | Semiconductor device | |
JPS57121256A (en) | Ceramic multilayer wiring structure | |
JPS57122556A (en) | Lead frame and manufacture of semiconductor device using the same | |
JPS6347264B2 (en) | ||
EP0347991A3 (en) | Use of venting slots to improve hermetic seal for semiconductor dice housed in ceramic packages | |
JPS553642A (en) | Manufacturing semiconductor device | |
JPS60192352A (en) | Sealing process of integrated circuit device | |
JPS5763833A (en) | Fabrication of semicondutor device | |
JPH04262559A (en) | Method and device for assembling semiconductor device | |
JPH06101487B2 (en) | Method for manufacturing semiconductor device | |
JPS5662348A (en) | Semiconductor device and production thereof | |
JPS6435921A (en) | Manufacture of semiconductor device | |
JPS5368573A (en) | Hermetic sealing method of semiconductor device | |
JPS5669846A (en) | Sealing method of package |