JPS6347264B2 - - Google Patents

Info

Publication number
JPS6347264B2
JPS6347264B2 JP57006016A JP601682A JPS6347264B2 JP S6347264 B2 JPS6347264 B2 JP S6347264B2 JP 57006016 A JP57006016 A JP 57006016A JP 601682 A JP601682 A JP 601682A JP S6347264 B2 JPS6347264 B2 JP S6347264B2
Authority
JP
Japan
Prior art keywords
melting point
low melting
point glass
sealing
pellets
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP57006016A
Other languages
Japanese (ja)
Other versions
JPS58124248A (en
Inventor
Kazuo Horiuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP601682A priority Critical patent/JPS58124248A/en
Publication of JPS58124248A publication Critical patent/JPS58124248A/en
Publication of JPS6347264B2 publication Critical patent/JPS6347264B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838—Bonding techniques
    • H01L2224/8389—Bonding techniques using an inorganic non metallic glass type adhesive, e.g. solder glass
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06—Polymers
    • H01L2924/078—Adhesive characteristics other than chemical
    • H01L2924/07802—Adhesive characteristics other than chemical not being an ohmic electrical conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/15165—Monolayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/166—Material

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Glass Compositions (AREA)
  • Joining Of Glass To Other Materials (AREA)

Description

【発明の詳細な説明】 本発明は、セラミツクをパツケージに使用する
半導体装置に係り、特にペレツト接着用低融点ガ
ラスを有するパツケージの半導体装置に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device using ceramic in a package, and more particularly to a semiconductor device in a package having a low melting point glass for bonding pellets.

一般にサーデイツプと称するセラミツクパツケ
ージ型の半導体装置では、パツケージベース、リ
ードフレーム及びパツケージキヤツプを封止用低
融点ガラスにて封止する一方、ペレツトをペレツ
ト接着用低融点ガラスにてベースに固着する構成
が採用されることがある。この場合、従来では、
前記した封止用低融点ガラスとペレツト接着用低
融点ガラスの軟化点が同一のものを採用してお
り、このためペレツト接着時に温度が高すぎると
封止用低融点ガラスがキヤビテイ内に流れ込み封
止時にガラス不足になつて封止が不完全なものに
なる一方、温度が低すぎると、ペレツトの接着が
悪くペレツトクラツク不良が生じる等の欠点があ
つた。 In a ceramic package type semiconductor device, generally called a ceramic package, the package base, lead frame, and package cap are sealed with low-melting glass for sealing, while the pellets are fixed to the base using low-melting glass for pellet adhesion. May be adopted. In this case, conventionally,
The low melting point glass for sealing and the low melting point glass for adhering the pellets mentioned above have the same softening point, so if the temperature is too high during pellet adhesion, the low melting point glass for sealing will flow into the cavity and cause the sealing. On the other hand, if the temperature was too low, the adhesion of the pellets would be poor and pellet cracks would occur, among other drawbacks.

したがつて、本発明の目的は、サーデイツプ型
パツケージの構成において、封止用低融点ガラス
より軟化点の低いペレツト接着用低融点ガラスを
採用することによりペレツトの接着性を良好にし
高歩留で高品質の製品を得ることができる半導体
装置を提供することにある。 Therefore, an object of the present invention is to improve the adhesion of pellets and achieve a high yield by employing a low melting point glass for pellet adhesion, which has a lower softening point than the low melting point glass for sealing, in the construction of a cerdip type package. The purpose of the present invention is to provide a semiconductor device from which high-quality products can be obtained.

本発明の要旨は、パツケージ本体のキヤビテイ
内に半導体ペレツト接着用低融点ガラスと、セラ
ミツクベースとセラミツクキヤツプを接着するた
めの封止用低融点ガラスを有する半導体装置にお
いて、前記半導体ペレツト接着用低融点ガラスの
軟化点は前記封止用低融点ガラスの軟化点よりも
低いことを特徴とする半導体装置にある。 The gist of the present invention is to provide a semiconductor device having a low melting point glass for bonding semiconductor pellets and a low melting point glass for bonding a ceramic base and a ceramic cap in a cavity of a package body. The semiconductor device is characterized in that the softening point of the glass is lower than the softening point of the low melting point glass for sealing.

以下、本発明の一実施例を第１図および第２図
に基づいて説明する。 Hereinafter, one embodiment of the present invention will be described based on FIGS. 1 and 2.

図において、１はパツケージ本体、２はセラミ
ツクベースであり、その中央凹部２ａの低面には
半導体ペレツト３を固着する。周辺には、外部導
出用の複数本のリード４を整列配置して封止用低
融点ガラス６にて支持している。これらのリード
４には、前記半導体ペレツト３との間にワイヤ８
を接続して電気的接続を図つている。５は、前記
セラミツクベースの上部を覆うようにして固着す
るセラミツクキヤツプであり周辺において前記封
止用低融点ガラス６にて固着し、これによりパツ
ケージ本体１を構成している。そして、前記半導
体ペレツトは、ペレツト接着用の低融点ガラス７
にてセラミツクベースに固着しており、このペレ
ツト接着用の低融点ガラス７は、封止用低融点ガ
ラス６と異なり、封止用低融点ガラス６より低い
温度の軟化点を有するように構成している。 In the figure, 1 is a package body, 2 is a ceramic base, and a semiconductor pellet 3 is fixed to the lower surface of the central recess 2a. Around the periphery, a plurality of leads 4 for leading out to the outside are aligned and supported by low melting point glass 6 for sealing. These leads 4 have wires 8 between them and the semiconductor pellet 3.
are connected to make an electrical connection. Reference numeral 5 denotes a ceramic cap that is fixed to cover the upper part of the ceramic base, and is fixed around the periphery with the low melting point glass 6 for sealing, thereby forming the package body 1. The semiconductor pellets are then bonded to a low melting point glass 7 for bonding the pellets.
This low melting point glass 7 for pellet adhesion is different from the low melting point glass 6 for sealing and is configured to have a softening point lower than that of the low melting point glass 6 for sealing. ing.

この構成によれば、ペレツト３をセラミツクベ
ース２に固着する際にセラミツクベースを加熱し
ても、これはペレツト接着用の低融点ガラス７の
軟化点まで加熱するのみでよく、これによりこれ
よりも軟化点の高い封止用低融点ガラス６が軟化
することはない。 According to this configuration, even if the ceramic base is heated when fixing the pellets 3 to the ceramic base 2, it is only necessary to heat the ceramic base to the softening point of the low melting point glass 7 for bonding the pellets. The low melting point glass 6 for sealing, which has a high softening point, will not soften.

なお、半導体ペレツト接着用低融点ガラス及び
封止用低融点ガラスは、市販品から適宜、選択す
ればよい。 Note that the low melting point glass for adhering semiconductor pellets and the low melting point glass for sealing may be appropriately selected from commercially available products.

一例として、日本電気硝子株式会社の下記の製
品を用いることができる。 As an example, the following products from Nippon Electric Glass Co., Ltd. can be used.

(1) 半導体ペレツト接着用低融点ガラスとして、
同社のLS―0113（製品コード）、軟化点；400
℃。(1) As a low melting point glass for adhering semiconductor pellets,
The company's LS-0113 (product code), softening point: 400
℃.

(2) 封止用低融点ガラスとして、同社のLS―
0110（製品コード）、軟化点；422℃。(2) As a low-melting glass for sealing, the company's LS-
0110 (product code), softening point: 422℃.

上記ガラスは、いずれも、低融点ガラス
（PbO・B2O3）粉末と特殊なセラミツク粉末を均
一にブレンドした、複合系低融点ガラスである
（同社の製品カタログより）。 All of the above glasses are composite low-melting glasses made by uniformly blending low-melting glass (PbO/B 2 O 3 ) powder and special ceramic powder (according to the company's product catalog).

したがつて、本発明によれば、ペレツト３の固
着時に、封止用低融点ガラス６のキヤビテイ内へ
の流れ込みを防止でき、ペレツト接着用低融点ガ
ラス７の軟化性を良くできることによりペレツト
固着が良好にでき、工程歩留の向上及び品質の向
上の効果がある。 Therefore, according to the present invention, when the pellets 3 are fixed, it is possible to prevent the low melting point glass 6 for sealing from flowing into the cavity, and the softening properties of the low melting point glass 7 for adhering the pellets can be improved, thereby preventing the pellets from sticking. It has the effect of improving process yield and quality.

【図面の簡単な説明】[Brief explanation of drawings]

第１図は本発明の半導体装置の上面図、第２図
は第１図の―線断面図でである。 １…パツケージ本体、２…セラミツクベース、
３…半導体ペレツト、４…リード、５…セラミツ
クキヤツプ、６…封止用低融点ガラス、７…ペレ
ツト付け用低融点ガラス、８…ワイヤ。 FIG. 1 is a top view of a semiconductor device of the present invention, and FIG. 2 is a sectional view taken along the line -- in FIG. 1...Package body, 2...Ceramic base,
3... Semiconductor pellet, 4... Lead, 5... Ceramic cap, 6... Low melting point glass for sealing, 7... Low melting point glass for attaching pellet, 8... Wire.

Claims (1)

【特許請求の範囲】[Claims] １ パツケージ本体のキヤビテイ内に半導体ペレ
ツト接着用低融点ガラスと、セラミツクベースと
セラミツクキヤツプを接着するための封止用低融
点ガラスを有する半導体装置において、前記半導
体ペレツト接着用低融点ガラスの軟化点は前記封
止用低融点ガラスの軟化点よりも低いことを特徴
とする半導体装置。1. In a semiconductor device having a low melting point glass for bonding semiconductor pellets and a low melting point glass for sealing bonding a ceramic base and a ceramic cap in the cavity of a package body, the softening point of the low melting point glass for bonding semiconductor pellets is A semiconductor device characterized in that the softening point is lower than the softening point of the low melting point glass for sealing.
JP601682A 1982-01-20 1982-01-20 Semiconductor device Granted JPS58124248A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP601682A JPS58124248A (en) 1982-01-20 1982-01-20 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP601682A JPS58124248A (en) 1982-01-20 1982-01-20 Semiconductor device

Publications (2)

Publication Number Publication Date
JPS58124248A JPS58124248A (en) 1983-07-23
JPS6347264B2 true JPS6347264B2 (en) 1988-09-21

Family

ID=11626897

Family Applications (1)

Application Number Title Priority Date Filing Date
JP601682A Granted JPS58124248A (en) 1982-01-20 1982-01-20 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS58124248A (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5073521A (en) * 1989-11-15 1991-12-17 Olin Corporation Method for housing a tape-bonded electronic device and the package employed
DE69329357T2 (en) * 1992-05-14 2001-04-26 Matsushita Electric Industrial Co., Ltd. Process for the production of conductors in contact holes in multilayer ceramic substrates

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50110772A (en) * 1974-02-08 1975-09-01
JPS5230352A (en) * 1975-09-04 1977-03-08 Nippon Telegr & Teleph Corp <Ntt> Micro program control method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50110772A (en) * 1974-02-08 1975-09-01
JPS5230352A (en) * 1975-09-04 1977-03-08 Nippon Telegr & Teleph Corp <Ntt> Micro program control method

Also Published As

Publication number Publication date
JPS58124248A (en) 1983-07-23

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