JPS57197631A - Method of controlling information processing system - Google Patents

Method of controlling information processing system

Info

Publication number
JPS57197631A
JPS57197631A JP8218381A JP8218381A JPS57197631A JP S57197631 A JPS57197631 A JP S57197631A JP 8218381 A JP8218381 A JP 8218381A JP 8218381 A JP8218381 A JP 8218381A JP S57197631 A JPS57197631 A JP S57197631A
Authority
JP
Japan
Prior art keywords
hold
processor
signal
subordinate
subordinate processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP8218381A
Other languages
Japanese (ja)
Other versions
JPS6010343B2 (en
Inventor
Kuniharu Onimura
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokogawa Electric Corp
Original Assignee
Yokogawa Electric Corp
Yokogawa Hokushin Electric Corp
Yokogawa Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokogawa Electric Corp, Yokogawa Hokushin Electric Corp, Yokogawa Electric Works Ltd filed Critical Yokogawa Electric Corp
Priority to JP8218381A priority Critical patent/JPS6010343B2/en
Publication of JPS57197631A publication Critical patent/JPS57197631A/en
Publication of JPS6010343B2 publication Critical patent/JPS6010343B2/en
Expired legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multi Processors (AREA)

Abstract

PURPOSE:To eliminate confusion in operation of a subordinate processor due to delay in processing by deciding immediately the change in status in accordance with a propriety state for holding of the subordinate processor itself by the subordinate processor in response to a hold requesting signal of a central processor. CONSTITUTION:A main central processor 1 sets a requesting signal to an FF circiut 15 through a data bus 3. On the other hand, a subordinate processor 0 to the output Q of an FF circuit 14 when the hold is acceptable, and 1 is set when unacceptable. Therefore, only when the hold is acceptable, the request signal passes through a gate 16, and hold status signal HLDA is immediately sent from the subordinate processor 2. Then, the main central processor 1 sends as inquiring signal to logic gates 17 and 18 through an address decoder 11, and if the hold status signal has been sent out, gives access to other device.
JP8218381A 1981-05-29 1981-05-29 Information processing system control method Expired JPS6010343B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8218381A JPS6010343B2 (en) 1981-05-29 1981-05-29 Information processing system control method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8218381A JPS6010343B2 (en) 1981-05-29 1981-05-29 Information processing system control method

Publications (2)

Publication Number Publication Date
JPS57197631A true JPS57197631A (en) 1982-12-03
JPS6010343B2 JPS6010343B2 (en) 1985-03-16

Family

ID=13767321

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8218381A Expired JPS6010343B2 (en) 1981-05-29 1981-05-29 Information processing system control method

Country Status (1)

Country Link
JP (1) JPS6010343B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4475143A (en) * 1983-01-10 1984-10-02 Rogers Corporation Decoupling capacitor and method of manufacture thereof
US4494169A (en) * 1983-11-14 1985-01-15 Rogers Corporation Decoupling capacitor and method of manufacture thereof

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61192344U (en) * 1985-05-20 1986-11-29

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4475143A (en) * 1983-01-10 1984-10-02 Rogers Corporation Decoupling capacitor and method of manufacture thereof
US4494169A (en) * 1983-11-14 1985-01-15 Rogers Corporation Decoupling capacitor and method of manufacture thereof

Also Published As

Publication number Publication date
JPS6010343B2 (en) 1985-03-16

Similar Documents

Publication Publication Date Title
JPS57117027A (en) Signal sending and receiving circuit
ES8603095A1 (en) Internal bus system for a primitive instruction set machine.
JPS55153024A (en) Bus control system
JPS57197631A (en) Method of controlling information processing system
JPS56110125A (en) Data processing device
JPS57166759A (en) Controlling method for common input/output bus
JPS56108125A (en) Access device
JPS5534780A (en) Priority decision device
JPS5491156A (en) Data processing system
JPS55108068A (en) Memory control system
JPS57176442A (en) Information processing system
JPS5515503A (en) Allocation control system for interruption request line
JPS54145447A (en) Input-output control system
JPS57109026A (en) Bus controlling system
JPS55118124A (en) Interface switch
JPS56168256A (en) Data processor
JPS57191751A (en) Integrated circuit information processing device
JPS57178524A (en) Interruption controlling system
KR940004446A (en) Bus interface device
JPS5723159A (en) Data processing system
JPS54127244A (en) Interruption control system
JPS51144137A (en) Input/output data control unit
JPS5783864A (en) Multiprocessor system
JPS57101928A (en) Interruption controlling system
JPS5746374A (en) Address conversion pair control system