JPS57176440A - Input and output interruption control system - Google Patents

Input and output interruption control system

Info

Publication number
JPS57176440A
JPS57176440A JP6117881A JP6117881A JPS57176440A JP S57176440 A JPS57176440 A JP S57176440A JP 6117881 A JP6117881 A JP 6117881A JP 6117881 A JP6117881 A JP 6117881A JP S57176440 A JPS57176440 A JP S57176440A
Authority
JP
Japan
Prior art keywords
register
interruption
input
bit
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6117881A
Other languages
English (en)
Japanese (ja)
Other versions
JPS634218B2 (enExample
Inventor
Haruo Kazami
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP6117881A priority Critical patent/JPS57176440A/ja
Publication of JPS57176440A publication Critical patent/JPS57176440A/ja
Publication of JPS634218B2 publication Critical patent/JPS634218B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46—Multiprogramming arrangements
    • G06F9/48—Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806—Task transfer initiation or dispatching
    • G06F9/4812—Task transfer initiation or dispatching by interrupt, e.g. masked

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)
JP6117881A 1981-04-24 1981-04-24 Input and output interruption control system Granted JPS57176440A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6117881A JPS57176440A (en) 1981-04-24 1981-04-24 Input and output interruption control system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6117881A JPS57176440A (en) 1981-04-24 1981-04-24 Input and output interruption control system

Publications (2)

Publication Number Publication Date
JPS57176440A true JPS57176440A (en) 1982-10-29
JPS634218B2 JPS634218B2 (enExample) 1988-01-28

Family

ID=13163636

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6117881A Granted JPS57176440A (en) 1981-04-24 1981-04-24 Input and output interruption control system

Country Status (1)

Country Link
JP (1) JPS57176440A (enExample)

Also Published As

Publication number Publication date
JPS634218B2 (enExample) 1988-01-28

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