JPS57170540A - Forming method for wire structure - Google Patents

Forming method for wire structure

Info

Publication number
JPS57170540A
JPS57170540A JP56055637A JP5563781A JPS57170540A JP S57170540 A JPS57170540 A JP S57170540A JP 56055637 A JP56055637 A JP 56055637A JP 5563781 A JP5563781 A JP 5563781A JP S57170540 A JPS57170540 A JP S57170540A
Authority
JP
Japan
Prior art keywords
layer
covered
substrate
insulator
air gaps
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56055637A
Other languages
Japanese (ja)
Inventor
Kinya Kato
Hiroo Ito
Hirohiko Hasegawa
Makoto Terajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP56055637A priority Critical patent/JPS57170540A/en
Publication of JPS57170540A publication Critical patent/JPS57170540A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02107—Forming insulating materials on a substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
  • Manufacturing Of Electric Cables (AREA)

Abstract

PURPOSE:To flatten the surface of a wiring structure by employing oxide glass as an insulator, and heating it to melt in viscous flow when the structure is formed by burying air gaps between conductors formed on a substrate with peripheral insulator having air gaps without interval with the insulator. CONSTITUTION:A conductor layer 8 made of a plurality of Mo is formed on a substrate 1, is covered with an etching mask 9 of resist, and an insulating layer 10 of oxide glass is covered by a sputtering method in nearly equal thickness to the layer 8 with molten glass target made of 50wt% of lead monoxide and 50wt% of silicon dioxide on the overall surface. Then, the substrate 1 is dipped in an ultrasonic wave bath of acetone, the mask 9 is removed together with the layer 10 covered thereon, is heated at 800 deg.C in N2 atomosphere for approx. 30min, the layer 10 is flowed in viscous state, and air gaps formed between the layers 8 and 10 are buried with the layer 10 without interval. In this manner, the layer 10 is fluidized with oxide gas having low compound temperature, thereby flattening the surface.
JP56055637A 1981-04-15 1981-04-15 Forming method for wire structure Pending JPS57170540A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56055637A JPS57170540A (en) 1981-04-15 1981-04-15 Forming method for wire structure

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56055637A JPS57170540A (en) 1981-04-15 1981-04-15 Forming method for wire structure

Publications (1)

Publication Number Publication Date
JPS57170540A true JPS57170540A (en) 1982-10-20

Family

ID=13004310

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56055637A Pending JPS57170540A (en) 1981-04-15 1981-04-15 Forming method for wire structure

Country Status (1)

Country Link
JP (1) JPS57170540A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5187981A (en) * 1975-01-31 1976-07-31 Hitachi Ltd

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5187981A (en) * 1975-01-31 1976-07-31 Hitachi Ltd

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