JPS57168170A - Inversion interval detection circuit for signal - Google Patents

Abstract

PURPOSE:To improve the counting accuracy by synchronizing clock pulses to be counted with the beginning of an inversion interval to be detected in an inversion detection circuit for signal used for a speed servo system or the like of a disc reproducer. CONSTITUTION:An oscillator 51 is provided to obtain a clock pulse NCP of a frequency Nfc N times as large as a clock pulse intended to detect the inversion interval of signal. An output pulse NCP of the oscillator 51 is supplied to a clock element of a division counter 52 and divided into 1/N thereby affording the clock pulse CP of a frequency fc. In this case, an output of an NAND gate 4 is fed to a clear terminal of the division counter 52 and cleared at the rising of a regenerative signal SP. The counter 52 is cleared at the beginning of the inversion interval at the ''0'' of the signal SP. An output of the counter 52 (the pulse CP of the frequency fc) is fed to a terminal of a counter 3 to count the number thereof CP contained in the inversion interval at ''0'' of the signal SP.