JPS57162548A - Test system for monitor signal receiver for voice multiplex communication - Google Patents
Test system for monitor signal receiver for voice multiplex communicationInfo
- Publication number
- JPS57162548A JPS57162548A JP4639181A JP4639181A JPS57162548A JP S57162548 A JPS57162548 A JP S57162548A JP 4639181 A JP4639181 A JP 4639181A JP 4639181 A JP4639181 A JP 4639181A JP S57162548 A JPS57162548 A JP S57162548A
- Authority
- JP
- Japan
- Prior art keywords
- monitor signal
- false
- test
- sss
- processor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/14—Monitoring arrangements
Abstract
PURPOSE:To test the multiframe step-out detecting function of a receiver (SSR) for reception of monitor signal, by providing a transmitter of false monitor signal and transmitting the false monitor signal in place of a monitor signal for each operation unit. CONSTITUTION:When a folded test is carried out, a false monitor signal transmitter (false SSS) 51 has no operation by a command given from a processor 54. And a memory switch 52 just functions to pass the monitor signal from a transmitter (SSS) for monitor signal. In case a test is given to a receiver using the normal data within the false SSS51, the address signal given to a control part 53 from a processor 54 is decoded. Thus the normal data of the SSS51 is transmitted, and at the same time a memory switch 52 selects and delivers the data. In the case of a test of the multiframe step-out detecting function of an SSR11, the processor 54 feeds an address signal to a control part 53 to deliver a fault data within the false SSS. At the same, the switch 52 is controlled to select and deliver the fault data.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4639181A JPS57162548A (en) | 1981-03-31 | 1981-03-31 | Test system for monitor signal receiver for voice multiplex communication |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4639181A JPS57162548A (en) | 1981-03-31 | 1981-03-31 | Test system for monitor signal receiver for voice multiplex communication |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57162548A true JPS57162548A (en) | 1982-10-06 |
Family
ID=12745842
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4639181A Pending JPS57162548A (en) | 1981-03-31 | 1981-03-31 | Test system for monitor signal receiver for voice multiplex communication |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57162548A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06284104A (en) * | 1993-03-26 | 1994-10-07 | Nec Corp | Coded voice signal channel generating circuit |
-
1981
- 1981-03-31 JP JP4639181A patent/JPS57162548A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH06284104A (en) * | 1993-03-26 | 1994-10-07 | Nec Corp | Coded voice signal channel generating circuit |
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