JPS57154867A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPS57154867A JPS57154867A JP56039414A JP3941481A JPS57154867A JP S57154867 A JPS57154867 A JP S57154867A JP 56039414 A JP56039414 A JP 56039414A JP 3941481 A JP3941481 A JP 3941481A JP S57154867 A JPS57154867 A JP S57154867A
- Authority
- JP
- Japan
- Prior art keywords
- base
- injector
- layer
- transistor
- sio2
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0214—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L
- H01L27/0229—Particular design considerations for integrated circuits for internal polarisation, e.g. I2L of bipolar structures
- H01L27/0233—Integrated injection logic structures [I2L]
Abstract
PURPOSE:To stabilize the surface, to increase the degree of integration and to reduce the junction capacitance of the subject semiconductor device by a method wherein, in the I<2>L consisting of a lateral transistor and an inverse transistor, the surface layer in the base region of the lateral transistor is formed as a semiconductor oxide film. CONSTITUTION:A thick SiO2 film 8 is formed on the surface of the N-epitaxial layer located between a P type base 5 and an injector 4 in such a manner that the layer 8 is surrounding the P type base 5 of the inverse NPN transistor. Also a section, which is not facing the injector and contacting the base 5, is formed as an SiO2 layer 9 in the depth reaching an N<+> buried layer 2. As a result, SiO2 is formed between the base and the injector, and the surface is stabilized. Also, the space between the base and the injector is reduced when compared with that of one heretofore manufactured, the degree of integration is increased, and the junction capacitance between the base side face and the epitaxial layer can also be reduced.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56039414A JPS57154867A (en) | 1981-03-20 | 1981-03-20 | Semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56039414A JPS57154867A (en) | 1981-03-20 | 1981-03-20 | Semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57154867A true JPS57154867A (en) | 1982-09-24 |
Family
ID=12552320
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56039414A Pending JPS57154867A (en) | 1981-03-20 | 1981-03-20 | Semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57154867A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6806555B2 (en) * | 2000-09-11 | 2004-10-19 | Infineon Technologies Ag | Semiconductor component and method for fabricating it |
-
1981
- 1981-03-20 JP JP56039414A patent/JPS57154867A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6806555B2 (en) * | 2000-09-11 | 2004-10-19 | Infineon Technologies Ag | Semiconductor component and method for fabricating it |
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