JPS57141745A - Switching control system for card reader - Google Patents
Switching control system for card readerInfo
- Publication number
- JPS57141745A JPS57141745A JP2749581A JP2749581A JPS57141745A JP S57141745 A JPS57141745 A JP S57141745A JP 2749581 A JP2749581 A JP 2749581A JP 2749581 A JP2749581 A JP 2749581A JP S57141745 A JPS57141745 A JP S57141745A
- Authority
- JP
- Japan
- Prior art keywords
- buffer
- outputs
- card
- goes
- section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/08—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers from or to individual record carriers, e.g. punched card, memory card, integrated circuit [IC] card or smart card
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Human Computer Interaction (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
Abstract
PURPOSE:To effectively use devices and to realize man-power saving of the operator, by automatically connecting a card to any of data processing systems based on information on an inputted card. CONSTITUTION:When a system switching card is inputted, it is read at a read section 10 and set to a buffer 13. In this case, the content of a column counter 14 shows 1 and a decoding circuit 16 outputs 1 signal. The content of the buffer 13 is * symbol and a decoder 15 outputs * signals. Thus, the output of an AND circuit 17 goes to 1 and an FF20 is set. When the 1-th column information is set to the buffer 13, AND circuits 18 and 19 are opened, and if the i-th column information goes to 1, the circuit 15 outputs 1 signal and an FF22 is set. If the i-th column information goes to 2, an FF21 is set. When the FF22 is set, a alteration switching section 12 is changed over to the system 1 and when the FF21 is set, the section 12 is changed over to the system 2.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2749581A JPS57141745A (en) | 1981-02-26 | 1981-02-26 | Switching control system for card reader |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2749581A JPS57141745A (en) | 1981-02-26 | 1981-02-26 | Switching control system for card reader |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57141745A true JPS57141745A (en) | 1982-09-02 |
Family
ID=12222713
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2749581A Pending JPS57141745A (en) | 1981-02-26 | 1981-02-26 | Switching control system for card reader |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57141745A (en) |
-
1981
- 1981-02-26 JP JP2749581A patent/JPS57141745A/en active Pending
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JPS57117027A (en) | Signal sending and receiving circuit | |
JPS56140452A (en) | Memory protection system | |
JPS54100634A (en) | Computer | |
ATE55528T1 (en) | VIDEO SIGNAL PROCESSING CIRCUITS. | |
JPS57141745A (en) | Switching control system for card reader | |
JPS558605A (en) | Data processing system | |
JPS55157022A (en) | Output circuit for microcomputer | |
JPS5694596A (en) | Memory control system | |
JPS5510614A (en) | Controller | |
JPS5570998A (en) | Block switching system for memory unit | |
JPS5487148A (en) | Data processing system by multiplex processor | |
JPS57152053A (en) | Program tracing device | |
JPS57143654A (en) | Memory sequence extending circuit | |
JPS54107235A (en) | Interrupt control system | |
JPS5760422A (en) | Data transfer controlling system | |
JPS5539935A (en) | Paper tape reading device | |
JPS5641600A (en) | Detection system for memory capacity | |
JPS56121124A (en) | Bus control system | |
JPS57191753A (en) | Register controlling system | |
SU643879A1 (en) | Microprocessor computer | |
JPS56114472A (en) | Rationalizing device for recording signal of partial reading and recording device | |
JPS57211645A (en) | Microprogram address controlling circuit | |
JPS5789174A (en) | Data processing control system | |
JPS52133732A (en) | Data input/output control system for information processing unit | |
JPS5498130A (en) | Input/output control system |