JPS57122559A - Integrated circuit module support - Google Patents

Integrated circuit module support

Info

Publication number
JPS57122559A
JPS57122559A JP56197585A JP19758581A JPS57122559A JP S57122559 A JPS57122559 A JP S57122559A JP 56197585 A JP56197585 A JP 56197585A JP 19758581 A JP19758581 A JP 19758581A JP S57122559 A JPS57122559 A JP S57122559A
Authority
JP
Japan
Prior art keywords
integrated circuit
circuit module
module support
support
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56197585A
Other languages
English (en)
Other versions
JPH0370374B2 (ja
Inventor
Hahiri Teerani Yaaya
Hotsupe Yoahimu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
GEE AA OO G FUYUURU AUTOMATSUIOON UNTO ORUGANIZATSUIOON MBH
GAO Gesellschaft fuer Automation und Organisation mbH
Original Assignee
GEE AA OO G FUYUURU AUTOMATSUIOON UNTO ORUGANIZATSUIOON MBH
GAO Gesellschaft fuer Automation und Organisation mbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by GEE AA OO G FUYUURU AUTOMATSUIOON UNTO ORUGANIZATSUIOON MBH, GAO Gesellschaft fuer Automation und Organisation mbH filed Critical GEE AA OO G FUYUURU AUTOMATSUIOON UNTO ORUGANIZATSUIOON MBH
Publication of JPS57122559A publication Critical patent/JPS57122559A/ja
Publication of JPH0370374B2 publication Critical patent/JPH0370374B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/12—Mountings, e.g. non-detachable insulating substrates
    • H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49572—Lead-frames or other flat leads consisting of thin flexible metallic tape with or without a film carrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01014—Silicon [Si]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01051—Antimony [Sb]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01058—Cerium [Ce]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Theoretical Computer Science (AREA)
  • Credit Cards Or The Like (AREA)
  • Wire Bonding (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
JP56197585A 1980-12-08 1981-12-08 Integrated circuit module support Granted JPS57122559A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE3046193 1980-12-08

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP3105556A Division JPH054479A (ja) 1980-12-08 1991-05-10 集積回路モジユール支持体を用いた識別カード

Publications (2)

Publication Number Publication Date
JPS57122559A true JPS57122559A (en) 1982-07-30
JPH0370374B2 JPH0370374B2 (ja) 1991-11-07

Family

ID=6118603

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56197585A Granted JPS57122559A (en) 1980-12-08 1981-12-08 Integrated circuit module support

Country Status (3)

Country Link
JP (1) JPS57122559A (ja)
BE (1) BE891283A (ja)
SE (1) SE503924C2 (ja)

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59222947A (ja) * 1983-06-02 1984-12-14 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
JPS61139894A (ja) * 1984-12-13 1986-06-27 Matsushita Electric Ind Co Ltd Ｉｄカ−ドおよびその製造方法
JPS6283672U (ja) * 1985-11-12 1987-05-28
JPS62226636A (ja) * 1986-03-28 1987-10-05 Matsushita Electric Ind Co Ltd プラスチツクチツプキヤリア
JPS63251297A (ja) * 1988-01-09 1988-10-18 カシオ計算機株式会社 電子桟器
JPH07153794A (ja) * 1994-10-21 1995-06-16 Matsushita Electric Ind Co Ltd 実装体
JP2519332B2 (ja) * 1988-07-08 1996-07-31 沖電気工業株式会社 半導体装置
JPH09120982A (ja) * 1996-09-02 1997-05-06 Hitachi Ltd テープキャリア
WO1998022980A1 (fr) * 1996-11-21 1998-05-28 Hitachi, Ltd. Dispositif a semi-conducteur et son procede de fabrication
WO1999048145A1 (fr) * 1998-03-19 1999-09-23 Hitachi, Ltd. Dispositif a semi-conducteur, procede de fabrication et structure de montage associes
US7540314B2 (en) 2001-09-14 2009-06-02 Sony Corporation Plastic card, plastic card manufacturing method, plate for heat press, and card manufacturing apparatus

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50135062U (ja) * 1974-04-23 1975-11-07
JPS50159262A (ja) * 1974-06-12 1975-12-23

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS50135062U (ja) * 1974-04-23 1975-11-07
JPS50159262A (ja) * 1974-06-12 1975-12-23

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0437585B2 (ja) * 1983-06-02 1992-06-19 Matsushita Electric Ind Co Ltd
JPS59222947A (ja) * 1983-06-02 1984-12-14 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
JPS61139894A (ja) * 1984-12-13 1986-06-27 Matsushita Electric Ind Co Ltd Ｉｄカ−ドおよびその製造方法
JPS6283672U (ja) * 1985-11-12 1987-05-28
JPS62226636A (ja) * 1986-03-28 1987-10-05 Matsushita Electric Ind Co Ltd プラスチツクチツプキヤリア
JPS63251297A (ja) * 1988-01-09 1988-10-18 カシオ計算機株式会社 電子桟器
JP2519332B2 (ja) * 1988-07-08 1996-07-31 沖電気工業株式会社 半導体装置
JPH07153794A (ja) * 1994-10-21 1995-06-16 Matsushita Electric Ind Co Ltd 実装体
JPH09120982A (ja) * 1996-09-02 1997-05-06 Hitachi Ltd テープキャリア
WO1998022980A1 (fr) * 1996-11-21 1998-05-28 Hitachi, Ltd. Dispositif a semi-conducteur et son procede de fabrication
US6759272B2 (en) 1996-11-21 2004-07-06 Renesas Technology Corp. Semiconductor device and manufacturing method thereof
WO1999048145A1 (fr) * 1998-03-19 1999-09-23 Hitachi, Ltd. Dispositif a semi-conducteur, procede de fabrication et structure de montage associes
US7540314B2 (en) 2001-09-14 2009-06-02 Sony Corporation Plastic card, plastic card manufacturing method, plate for heat press, and card manufacturing apparatus

Also Published As

Publication number Publication date
SE8803469L (sv) 1988-09-30
JPH0370374B2 (ja) 1991-11-07
BE891283A (fr) 1982-03-16
SE8803469D0 (sv) 1988-09-30
SE503924C2 (sv) 1996-09-30

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