JPS57106982A - Data processor - Google Patents

Data processor

Info

Publication number
JPS57106982A
JPS57106982A JP55183335A JP18333580A JPS57106982A JP S57106982 A JPS57106982 A JP S57106982A JP 55183335 A JP55183335 A JP 55183335A JP 18333580 A JP18333580 A JP 18333580A JP S57106982 A JPS57106982 A JP S57106982A
Authority
JP
Japan
Prior art keywords
instruction
vector
processor
instructions
succeeding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55183335A
Other languages
Japanese (ja)
Other versions
JPS61666B2 (en
Inventor
Katsumi Onishi
Kiyosumi Sato
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP55183335A priority Critical patent/JPS57106982A/en
Publication of JPS57106982A publication Critical patent/JPS57106982A/en
Publication of JPS61666B2 publication Critical patent/JPS61666B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)

Abstract

PURPOSE:To speed the whole processing by decreasing the amount of hardware of a vector processor by performing all of an instruction fetch, interruption recetion, etc., by a main processor and by executing vector instruction as succeeding group units by the vector processor. CONSTITUTION:A main storage device fetches instructions from a storage device 3 and, while storing them in an instruction buffer 4 temporarily, decodes instructions in the buffer 4 by the 2nd control circuit 8. As a result, when a scaler instruction is obtained, a scaler arithmetic device 6 is actuated to perform arithmetic. On the other hand, a vector instruction is obtained as a result of the decoding, the vector instruction is sent to a vector processor 2 through the 1st control circuit 7. Further, the circuit 8, when detecting a scalar instruction frollowing succeeding vector instructions, sends a final instruction signal, showing the ending of the succeeding vector instructions, to the processor 2.
JP55183335A 1980-12-24 1980-12-24 Data processor Granted JPS57106982A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55183335A JPS57106982A (en) 1980-12-24 1980-12-24 Data processor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55183335A JPS57106982A (en) 1980-12-24 1980-12-24 Data processor

Publications (2)

Publication Number Publication Date
JPS57106982A true JPS57106982A (en) 1982-07-03
JPS61666B2 JPS61666B2 (en) 1986-01-10

Family

ID=16133915

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55183335A Granted JPS57106982A (en) 1980-12-24 1980-12-24 Data processor

Country Status (1)

Country Link
JP (1) JPS57106982A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57111772A (en) * 1980-12-29 1982-07-12 Fujitsu Ltd Information processor
JPS5936874A (en) * 1982-08-26 1984-02-29 Fujitsu Ltd Processor of vector
EP0141232A2 (en) * 1983-10-24 1985-05-15 International Business Machines Corporation Vector processing unit
US5073970A (en) * 1985-11-13 1991-12-17 Hitachi, Ltd. Vector processing apparatus allowing succeeding vector instruction chain processing upon completion of decoding of a preceding vector instruction chain

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57111772A (en) * 1980-12-29 1982-07-12 Fujitsu Ltd Information processor
JPS6250868B2 (en) * 1980-12-29 1987-10-27 Fujitsu Ltd
JPS5936874A (en) * 1982-08-26 1984-02-29 Fujitsu Ltd Processor of vector
JPS6346872B2 (en) * 1982-08-26 1988-09-19 Fujitsu Ltd
EP0141232A2 (en) * 1983-10-24 1985-05-15 International Business Machines Corporation Vector processing unit
US5073970A (en) * 1985-11-13 1991-12-17 Hitachi, Ltd. Vector processing apparatus allowing succeeding vector instruction chain processing upon completion of decoding of a preceding vector instruction chain

Also Published As

Publication number Publication date
JPS61666B2 (en) 1986-01-10

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