JPS57106234A - Logical operation circuit - Google Patents
Logical operation circuitInfo
- Publication number
- JPS57106234A JPS57106234A JP55183430A JP18343080A JPS57106234A JP S57106234 A JPS57106234 A JP S57106234A JP 55183430 A JP55183430 A JP 55183430A JP 18343080 A JP18343080 A JP 18343080A JP S57106234 A JPS57106234 A JP S57106234A
- Authority
- JP
- Japan
- Prior art keywords
- load
- level
- driving
- logical
- enhancement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/0008—Arrangements for reducing power consumption
Abstract
PURPOSE:To realize a low power consumption and a high-speed operation, by connecting an enhancement and depletion transistors in parallel as load elements of a logical gate where a field effect transistor for driving and a field effect transistor for load are connected in series. CONSTITUTION:In respect to the basic circuit constitution, a parallel circuit of enhancement and depletion MOS transistors TRs T and T' for load is connected in series to a driving TRQ, and the element T' flows a slight current to raise the output level of a logical operation circuit to a high-level power source voltage VDD, and the current flowed to the element T' is limited to a low value even if the logical state for the output of the L level is satisfied, that is, the H level and the L level are applied to the gate of the driving TR and load elements T and T', respectively. The element T is a load TR for push-pull operation and enlarges a current capacity to make a transient variance high-speed. Since the load element T and the driving TR are not turned on simultaneously in the steady state, excessive power is not consumed.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55183430A JPS57106234A (en) | 1980-12-24 | 1980-12-24 | Logical operation circuit |
US06/331,290 US4489246A (en) | 1980-12-24 | 1981-12-16 | Field effect transistor logic circuit having high operating speed and low power consumption |
EP81305982A EP0055570A3 (en) | 1980-12-24 | 1981-12-21 | Logic circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55183430A JPS57106234A (en) | 1980-12-24 | 1980-12-24 | Logical operation circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS57106234A true JPS57106234A (en) | 1982-07-02 |
Family
ID=16135632
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55183430A Pending JPS57106234A (en) | 1980-12-24 | 1980-12-24 | Logical operation circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57106234A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59182630A (en) * | 1983-03-28 | 1984-10-17 | モトロ−ラ・インコ−ポレ−テツド | High speed drive circuit |
JPH08172348A (en) * | 1994-12-20 | 1996-07-02 | Nec Miyagi Ltd | Output buffer circuit |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5239354A (en) * | 1975-09-23 | 1977-03-26 | Toshiba Corp | Drive circuit |
-
1980
- 1980-12-24 JP JP55183430A patent/JPS57106234A/en active Pending
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5239354A (en) * | 1975-09-23 | 1977-03-26 | Toshiba Corp | Drive circuit |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59182630A (en) * | 1983-03-28 | 1984-10-17 | モトロ−ラ・インコ−ポレ−テツド | High speed drive circuit |
JPH08172348A (en) * | 1994-12-20 | 1996-07-02 | Nec Miyagi Ltd | Output buffer circuit |
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