JPS57104351A - Signal conversion circuit - Google Patents
Signal conversion circuitInfo
- Publication number
- JPS57104351A JPS57104351A JP18018680A JP18018680A JPS57104351A JP S57104351 A JPS57104351 A JP S57104351A JP 18018680 A JP18018680 A JP 18018680A JP 18018680 A JP18018680 A JP 18018680A JP S57104351 A JPS57104351 A JP S57104351A
- Authority
- JP
- Japan
- Prior art keywords
- output
- inputted
- gates
- output signal
- signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/20—Repeater circuits; Relay circuits
- H04L25/22—Repeaters for converting two wires to four wires; Repeaters for converting single current to double current
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Electronic Switches (AREA)
- Dc Digital Transmission (AREA)
Abstract
PURPOSE:To protect an output stage transistor of a unipolar/bipolar converter without causing the amplitude lowering, by preventing the output-stage transistor from continuously being turned on with simple circuit constitution. CONSTITUTION:A clock signal (a) and a data signal (b) are inputted to an NAND gate G1, an output signal (c) is inputted to a flip-flop FF and an NAND gate G2, and pulse signals appear on the output of gates G3, G5 alternately. The output signal (c) is inputted to a monostable multivibrator MMV, which is triggered when the output signal (c) changes from 1 to 0. and an output signal (j) is inputted to gates G4, G6, which are controlled based on a prescribed duration time T1 of the monostable multivibrator MMV. Thus, even if the output of the gate G3 or G5 is at consecutive ''1'' through the generation of a failure, the state is suppressed to the prescribed time T1 with the gates G4, G6, allowing to avoid defective output-stage transistors Q1, Q2.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18018680A JPS57104351A (en) | 1980-12-19 | 1980-12-19 | Signal conversion circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP18018680A JPS57104351A (en) | 1980-12-19 | 1980-12-19 | Signal conversion circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57104351A true JPS57104351A (en) | 1982-06-29 |
JPS6159016B2 JPS6159016B2 (en) | 1986-12-15 |
Family
ID=16078883
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP18018680A Granted JPS57104351A (en) | 1980-12-19 | 1980-12-19 | Signal conversion circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57104351A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2609852A1 (en) * | 1987-01-20 | 1988-07-22 | Telecommunications Sa | BINARY-BIPOLAR CONVERTER |
JPH01136423A (en) * | 1987-11-20 | 1989-05-29 | Fujitsu Ltd | Unipolar/bipolar conversion circuit |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS538608A (en) * | 1976-07-13 | 1978-01-26 | Ibigawa Electric Ind Co Ltd | Manufacture of antiioxidizing carbon products |
-
1980
- 1980-12-19 JP JP18018680A patent/JPS57104351A/en active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS538608A (en) * | 1976-07-13 | 1978-01-26 | Ibigawa Electric Ind Co Ltd | Manufacture of antiioxidizing carbon products |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2609852A1 (en) * | 1987-01-20 | 1988-07-22 | Telecommunications Sa | BINARY-BIPOLAR CONVERTER |
JPH01136423A (en) * | 1987-11-20 | 1989-05-29 | Fujitsu Ltd | Unipolar/bipolar conversion circuit |
Also Published As
Publication number | Publication date |
---|---|
JPS6159016B2 (en) | 1986-12-15 |
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