JPS57100690A - Nonvolatile semiconductor memory - Google Patents

Nonvolatile semiconductor memory

Info

Publication number
JPS57100690A
JPS57100690A JP55175297A JP17529780A JPS57100690A JP S57100690 A JPS57100690 A JP S57100690A JP 55175297 A JP55175297 A JP 55175297A JP 17529780 A JP17529780 A JP 17529780A JP S57100690 A JPS57100690 A JP S57100690A
Authority
JP
Japan
Prior art keywords
test
memory
reliability
output
potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP55175297A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6219000B2 (OSRAM
Inventor
Hiroshi Iwahashi
Masamichi Asano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP55175297A priority Critical patent/JPS57100690A/ja
Publication of JPS57100690A publication Critical patent/JPS57100690A/ja
Publication of JPS6219000B2 publication Critical patent/JPS6219000B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C29/30—Accessing single arrays
    • G11C29/34—Accessing multiple bits simultaneously

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Non-Volatile Memory (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
JP55175297A 1980-12-12 1980-12-12 Nonvolatile semiconductor memory Granted JPS57100690A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP55175297A JPS57100690A (en) 1980-12-12 1980-12-12 Nonvolatile semiconductor memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP55175297A JPS57100690A (en) 1980-12-12 1980-12-12 Nonvolatile semiconductor memory

Publications (2)

Publication Number Publication Date
JPS57100690A true JPS57100690A (en) 1982-06-22
JPS6219000B2 JPS6219000B2 (OSRAM) 1987-04-25

Family

ID=15993634

Family Applications (1)

Application Number Title Priority Date Filing Date
JP55175297A Granted JPS57100690A (en) 1980-12-12 1980-12-12 Nonvolatile semiconductor memory

Country Status (1)

Country Link
JP (1) JPS57100690A (OSRAM)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59107493A (ja) * 1982-12-09 1984-06-21 Ricoh Co Ltd テスト回路付きｅｐｒｏｍメモリ装置
JPH01113999A (ja) * 1987-10-28 1989-05-02 Toshiba Corp 不揮発性メモリのストレステスト回路
US4956819A (en) * 1987-03-16 1990-09-11 Siemens Aktiengesellschaft Circuit configuration and a method of testing storage cells
JP2008004159A (ja) * 2006-06-21 2008-01-10 Toshiba Corp 半導体記憶装置及びそのテスト方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59107493A (ja) * 1982-12-09 1984-06-21 Ricoh Co Ltd テスト回路付きｅｐｒｏｍメモリ装置
US4956819A (en) * 1987-03-16 1990-09-11 Siemens Aktiengesellschaft Circuit configuration and a method of testing storage cells
JPH01113999A (ja) * 1987-10-28 1989-05-02 Toshiba Corp 不揮発性メモリのストレステスト回路
JP2008004159A (ja) * 2006-06-21 2008-01-10 Toshiba Corp 半導体記憶装置及びそのテスト方法

Also Published As

Publication number Publication date
JPS6219000B2 (OSRAM) 1987-04-25

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