JPS5697128A - Data processor with display device - Google Patents
Data processor with display deviceInfo
- Publication number
- JPS5697128A JPS5697128A JP17267079A JP17267079A JPS5697128A JP S5697128 A JPS5697128 A JP S5697128A JP 17267079 A JP17267079 A JP 17267079A JP 17267079 A JP17267079 A JP 17267079A JP S5697128 A JPS5697128 A JP S5697128A
- Authority
- JP
- Japan
- Prior art keywords
- display
- cpu11
- cpu
- bus
- buffer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Bus Control (AREA)
- Digital Computer Display Output (AREA)
Abstract
PURPOSE: To enable the processing of instruction without interruption to CPU, by monitoring and detecting the state where CPU does not use the bus, in a display control device, and directly fetching the display data and displaying it through the use of memories possible for write-in/readout even with this state.
CONSTITUTION: Between the the data processing circuit consisting of CPU11, address buffer 12, address buses 13 and 16, address decoder 14, program memory 15, data buffer 17, memory 18 possible for read/write, clock generator 20, and display data buffer 24, and the dispaly device 25, a display device 19 is inserted via the decorder 26 added, and the state where CPU11 is in operation and buses 13, 16 are not used, is detected. That is, the signal at the terminal 35 of CPU11 is detected at the inverter 36 in the device 19 to detect the vacancy of the bus with the latch instruction forming circuit 37. Thus, even if the CPU is in operation and vacant bus is present, the instruction is fed to the dispaly device 25 via the buffer 24 from the circuit 37 for specified display.
COPYRIGHT: (C)1981,JPO&Japio
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17267079A JPS5697128A (en) | 1979-12-31 | 1979-12-31 | Data processor with display device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP17267079A JPS5697128A (en) | 1979-12-31 | 1979-12-31 | Data processor with display device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5697128A true JPS5697128A (en) | 1981-08-05 |
Family
ID=15946187
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP17267079A Pending JPS5697128A (en) | 1979-12-31 | 1979-12-31 | Data processor with display device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5697128A (en) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59157740A (en) * | 1983-02-25 | 1984-09-07 | Nec Home Electronics Ltd | Data transfer method of microcomputer system |
US5001941A (en) * | 1989-04-24 | 1991-03-26 | Kanzaki Kokyukoki Mfg. Co., Ltd. | Transmission assembly for tractors |
-
1979
- 1979-12-31 JP JP17267079A patent/JPS5697128A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS59157740A (en) * | 1983-02-25 | 1984-09-07 | Nec Home Electronics Ltd | Data transfer method of microcomputer system |
US5001941A (en) * | 1989-04-24 | 1991-03-26 | Kanzaki Kokyukoki Mfg. Co., Ltd. | Transmission assembly for tractors |
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